wm8782a Wolfson Microelectronics plc, wm8782a Datasheet
wm8782a
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wm8782a Summary of contents
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... DESCRIPTION The WM8782A is a high performance, low cost stereo audio ADC designed for recordable media applications. The device offers stereo line level inputs along with two control input pins (FORMAT, IWL) to allow operation of the audio interface in three industry standard modes. An internal op-amp is integrated on the front end of the chip to ...
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... WM8782A DESCRIPTION ....................................................................................................... 1 FEATURES............................................................................................................. 1 APPLICATIONS ..................................................................................................... 1 BLOCK DIAGRAM ................................................................................................. 1 TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION ........................................................................................... 3 ORDERING INFORMATION .................................................................................. 3 PIN DESCRIPTION ................................................................................................ 4 ABSOLUTE MAXIMUM RATINGS ......................................................................... 5 THERMAL PERFORMANCE ................................................................................. 5 RECOMMENDED OPERATING CONDITIONS ..................................................... 6 ELECTRICAL CHARACTERISTICS ...................................................................... 6 TERMINOLOGY ............................................................................................................. 7 SIGNAL TIMING REQUIREMENTS ....................................................................... 8 SYSTEM CLOCK TIMING .............................................................................................. 8 AUDIO INTERFACE TIMING – SLAVE MODE .............................................................. 9 DEVICE DESCRIPTION ....................................................................................... 10 INTRODUCTION .......................................................................................................... 10 ADC ............................................................................................................................. 10 ADC DIGITAL FILTER ...
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... Note: Reel quantity = 2,000 w 20 M/S 19 AINL 18 AINOPL 17 COM 16 AINR 15 AINOPR 14 AGND 13 AVDD 12 VREFP 11 VREFGND PACKAGE MOISTURE SENSITIVITY 20-lead SSOP (Pb-free) 20-lead SSOP (Pb-free, tape and reel) WM8782A PEAK SOLDERING LEVEL TEMPERATURE o MSL2 260 C o MSL2 260 C PD, April 2010, Rev 4.8 3 ...
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... WM8782A PIN DESCRIPTION NAME PIN NO. 1 MCLK 2 DOUT 3 LRCLK 4 DGND 5 DVDD 6 BCLK Digital Tristate Input 7 IWL 8 FSAMPEN Digital Tristate Input 9 FORMAT Digital Tristate Input 10 VMID 11 VREFGND 12 VREFP 13 AVDD 14 AGND 15 AINOPR 16 AINR 17 COM 18 AINOPL 19 AINL 20 M/S w TYPE Digital Input Master Clock Digital Output ...
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... THERMAL PERFORMANCE PARAMETER Thermal resistance – junction to ambient Notes: 1. Figure given for package mounted on 4-layer FR4 according to JESD51-7. (No forced air flow is assumed). 2. Thermal performance figures are estimated. w SYMBOL TEST CONDITIONS R θJA WM8782A MIN MAX -0.3V +4.5V -0.3V +7V DGND -0.3V DVDD + 0.3V AGND -0.3V AVDD +0.3V -55°C +125°C -65°C +150° ...
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... WM8782A RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Analogue supply range Ground Operating temperature range Notes: 1. Digital supply DVDD must never be more than 0.3V greater than AVDD. ELECTRICAL CHARACTERISTICS Test Conditions DVDD = 3.3V, AVDD = 5.0V +25 A unless otherwise stated. PARAMETER ADC Performance – WM8782SEDS, WM8782SEDS/R (+25˚C) ...
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... =1mA -1mA 0.9 x DVDD OH OH VMID AVDD to VMID and VMID to VREFN R VMID VREFP I VREF I VREF AVDD = 5V DVDD = 3.3V WM8782A MIN TYP MAX 0.8 2.0 -1 ±0 0.1 x DVDD –4% AVDD/2 +4% 70 –4% AVDD/2 + 0.5 PD, April 2010, Rev 4.8 UNIT V V μ ...
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... WM8782A SIGNAL TIMING REQUIREMENTS SYSTEM CLOCK TIMING Figure 1 System Clock Timing Requirements Test Conditions DVDD = 3.3V, DGND = 0V +25 A PARAMETER System Clock Timing Information MCLK System clock pulse width high MCLK System clock pulse width low MCLK System clock cycle time MCLK duty cycle ...
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... LRCLK hold time from BCLK rising edge DOUT propagation delay from BCLK falling edge Table 2 Digital Audio Data Timing – Slave Mode Note: LRCLK should be synchronous with MCLK, although the WM8782A interface is tolerant of phase variations or jitter on these signals Slave Mode 48kHz, MCLK = 256fs, 24-bit data, unless otherwise stated. ...
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... The line inputs are biased internally through the operational amplifier to V ADC The WM8782A uses a multi-bit over sampled sigma-delta ADC. A single channel of the ADC is illustrated in Figure 3 Multi-Bit Oversampling Sigma Delta ADC Schematic. Figure 3 Multi-Bit Oversampling Sigma Delta ADC Schematic The use of multi-bit feedback and high oversampling rates reduces the effects of jitter and high frequency noise ...
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... I SLAVE MODE OPERATION The WM8782A can be configured as a slave mode device. In slave mode, the WM8782A responds with data to clocks it receives over the digital audio interface. The mode is selected by setting the MS input pin (see Table 3 Slave selection below). Slave mode is illustrated below. ...
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... WM8782A AUDIO DATA FORMATS In Left Justified mode, the MSB is available on the first rising edge of BCLK following an LRCLK transition. The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition. ...
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... ADC. The master clock is used to operate the digital filters and the noise shaping circuits. The WM8782A supports master clocks of 128fs, 192fs, 256fs, 384fs, 512fs and 768fs, where fs is the audio sampling frequency (LRCLK) ...
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... WM8782A POWER DOWN CONTROL The WM8782A can be powered down by stopping MCLK. Power down mode using MCLK is entered after 65536/fs clocks. On power-up, the WM8782A applies the power-on reset sequence described below. When MCLK is stopped DOUT is forced to zero. POWER ON RESET Figure 8 Power Supply Timing Requirements – Power-on Figure 9 Power Supply Timing Requirements – ...
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... Measured from falling poff EDGE of POR pora MIN TYP MAX 0.7 0.7 0.7 DVDD Min AVDD Min 1 30 Defined by DVDD/AVDD/ VMID Rise Time 0.8 0.8 0 level (Figure 8) levels (Figure 8). porr . This may be important if the por_off PD, April 2010, Rev 4.8 WM8782A UNIT μ μs μs 15 ...
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... WM8782A DIGITAL FILTER CHARACTERISTICS The WM8782A digital filter characteristics scale with sample rate. PARAMETER ADC Sample Rate (Single Rate – 48Hz typically) Passband Passband Ripple Stopband Stopband Attenuation Group Delay ADC Sample Rate (Dual Rate – 96kHz typically) Passband Passband Ripple ...
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... Production Data ADC HIGH PASS FILTER The WM8782A has a digital highpass filter to remove DC offsets. The filter response is characterised by the following polynomial H( 0.9995z 0 -5 -10 -15 0 0.0005 0.001 Frequency (Fs) Figure 12 ADC Highpass Filter Response w 0.0015 0.002 WM8782A PD, April 2010, Rev 4.8 17 ...
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... WM8782A APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 13 External Components Diagram RECOMMENDED EXTERNAL COMPONENTS VALUES COMPONENT SUGGESTED REFERENCE VALUE C1 and C8 10μF C2 and C7 0.1μF C5 and C6 10μF R1 10kΩ R2 and R5 10kΩ R3 and R6 5kΩ R4 3.3kΩ C4 0.1μF C3 10μF C9 0.1μF C10 10μF Table 8 External Components Description The above Table 8 shows resistor values which will give a gain of 0 ...
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... B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.20MM. D. MEETS JEDEC.95 MO-150, VARIATION = AE. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS -C- 0.10 C SEATING PLANE (mm) NOM MAX ----- 2.0 ----- ----- 1.75 1.85 0.30 0.38 ----- 0.25 7.20 7.50 7.80 8.20 5.30 5.60 0.75 0. WM8782A DM0015.C GAUGE Θ PLANE 0. PD, April 2010, Rev 4.8 19 ...
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... WM8782A IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...