wm8775 Wolfson Microelectronics plc, wm8775 Datasheet - Page 7

• Manufacturer Part Number: wm8775
• Description: 24-bit, 96khz Adc With 4 Channel I/p Multiplexer
• Manufacturer: Wolfson Microelectronics plc

Production Data
TERMINOLOGY
1.
2.
3.
4.
5.
6.
Figure 1 Master Clock Timing Requirements
Table 1 Master Clock Timing Requirements
Note:
If MCLK period is longer than maximum specified above, power-saving mode is entered. In this power-saving mode, all
registers will retain their values and can be accessed in the normal manner through the control interface.
w
MASTER CLOCK TIMING
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, T
PARAMETER
System Clock Timing Information
MCLK System clock pulse width
high
MCLK System clock pulse width
low
MCLK System clock cycle time
MCLK Duty cycle
Power-saving mode activated
Normal mode resumed
with no signal applied. (No Auto-zero or Automute function is employed in achieving these results).
Normally a THD+N measurement at 60dB below full scale. The measured signal is then corrected by adding the 60dB
to it. (e.g. THD+N @ -60dB= -32dB, DR= 92dB).
the other. Normally measured by sending a full scale signal down one channel and measuring the other.
Signal-to-noise ratio (dB) - SNR is a measure of the difference in level between the full scale output and the output
Dynamic range (dB) - DNR is a measure of the difference between the highest and lowest portions of a signal.
THD+N (dB) - THD+N is a ratio, of the rms values, of (Noise + Distortion)/Signal.
Stop band attenuation (dB) - Is the degree to which the frequency spectrum is attenuated (outside audio band).
Channel Separation (dB) - Also known as Cross-Talk. This is a measure of the amount one channel is isolated from
Pass-Band Ripple - Any variation of the frequency response in the pass-band region.
MCLK
SYMBOL
t
t
t
MCLKH
MCLKL
MCLKY
t
MCLKL
t
MCLKY
After MCLK re-started
After MCLK stopped
TEST CONDITIONS
A
t
MCLKH
= +25
o
C, fs = 48kHz, MCLK = 256fs unless otherwise stated.
40:60
MIN
0.5
11
11
28
2
TYP
PD, Rev 4.4, October 2008
60:40
1000
MAX
10
1
WM8775
MCLK
UNIT
cycle
ns
ns
ns
µs
7