wm8595 Wolfson Microelectronics plc, wm8595 Datasheet - Page 41

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wm8595

Manufacturer Part Number
wm8595
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet

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DIGITAL AUDIO PORT PIN CONFIGURATION
The MCLK1 pin is defined as an input or an output using MCLK1_SEL[2:0].
LRCLK1 pins are always defined as inputs or outputs together using WORDCLK1_SEL[2:0].
DACDAT1 is always an input.
The MCLK2 pin is defined as an input or an output using MCLK2_SEL[2:0].
LRCLK2 pins are always defined as inputs or outputs together using WORDCLK2_SEL[2:0].
DACDAT2 is always an input.
Table 32 Digital Audio Port 1 Pin Configuration
Table 33 Digital Audio Port 2 Pin Configuration
REGISTER
REGISTER
ADDRESS
AIF_MUX1
ADDRESS
AIF_MUX2
R37
R38
25h
26h
BIT
BIT
3:1
6:4
3:1
6:4
MCLK1_
SEL[2:0]
SEL[2:0]
MCLK2_
SEL[2:0]
SEL[2:0]
LABEL
LABEL
WORD
WORD
CLK1_
CLK2_
DEFAULT
DEFAULT
000
000
001
001
MCLK1 Pin Function Select
000 = Input to WM8595
001 = Output MCLK2
010 to 111 = Reserved
BCLK1 and LRCLK1 Pins Function Select
000 = Inputs to WM8595
001 = Output BCLK2 and LRCLK2
010 to 110 = Reserved
111 = Output ADCBCLK and ADCBCLK
(when ADC is master mode)
MCLK2 Pin Function Select
000 = Output MCLK1
001 = Input to WM8595
010 to 111 = Reserved
BCLK2 and LRCLK2 Pins Function Select
000 = Output BCLK1 and LRCLK1
001 = Inputs to WM8595
010 to 110 = Reserved
111 = Output ADCBCLK and ADCBCLK
(when ADC is master mode)
DESCRIPTION
DESCRIPTION
PD, Rev 4.1, April 2010
The BCLK1 and
The BCLK2 and
WM8595
41

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