wm8580a Wolfson Microelectronics plc, wm8580a Datasheet - Page 69

• Manufacturer Part Number: wm8580a
• Description: Multichannel Codec With S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics plc

Production Data
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Table 68 Interrupt Status Register
REGISTER
ADDRESS
(read-only)
INTSTAT
R43
2Bh
INTERRUPT GENERATION (INT_N)
The hardware interrupot INT_N flag (active low) indicates that a change of status has occurred on
one or more of the UNLOCK, INVALID, TRANS_ERR, NON_AUDIO, CPY_N, DEEMPH, CSUD or
REC_FREQ flags. To determine which flag caused the interrupt, the Interrupt Status Register
(INTSTAT) should be read when INT_N is asserted. INVALID, TRANS_ERR and CSUD generate an
interrupt when the flag transitions from low to high. UNLOCK, NON_AUDIO, CPY_N, DEEMPH and
REC_FREQ will generate an interrupt on any change in status. INT_N will remain asserted until it is
cleared by reading the interrupt status register. If INVALID, TRANS_ERR or CSUD are still active
when the interrupt status register is read, INT_N remains asserted.
Where the INT_N has been asserted by an update signal (UPD_UNLOCK, UPD_NON_AUDIO,
UPD_CPY_N, UPD_DEEMPH, UPD_REC_FREQ) the S/PDIF Status Register can be read to reveal
the satus of the flag. See Table 69.
BIT
0
1
2
3
4
5
6
7
UPD_REC_FREQ
UPD_DEEMPH
UPD_UNLOCK
UPD_NON_AUDIO
INT_INVALID
UPD_CPY_N
INT_TRANS
INT_CSUD
LABEL
_ERR
DEFAULT
-
-
-
-
-
-
-
-
UNLOCK flag update signal
0 = INT_N not caused by update to UNLOCK flag
1 = INT_N caused by update to UNLOCK flag
INVALID flag interrupt signal
0 = INT_N not caused by INVALID flag
1 = INT_N caused by INVALID flag
CSUD flag interrupt signal
0 = INT_N not caused by CSUD flag
1 = INT_N caused by CSUD flag
TRANS_ERR flag interrupt signal
0 = INT_N not caused by TRANS_ERR flag
1 = INT_N caused by TRANS_ERR flag
NON_AUDIO update signal
0 = INT_N not caused by update to NON_AUDIO flag
1 = INT_N caused by update to NON_AUDIO flag
CPY_N update signal
0 = INT_N not caused by update to CPY_N flag
1 = INT_N caused by update to CPY_N flag
DEEMPH update signal
0 = INT_N not caused by update to DEEMPH flag
1 = INT_N caused by update to DEEMPH flag
REC_FREQ update signal
0 = INT_N not caused by update to REC_FREQ flag
1 = INT_N caused by update to REC_FREQ flag
DESCRIPTION
PD, Rev 4.7, March 2009
WM8580
69