wm8580a Wolfson Microelectronics plc, wm8580a Datasheet - Page 95

• Manufacturer Part Number: wm8580a
• Description: Multichannel Codec With S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics plc

Production Data
w
READBACK
REGISTER
ADDRESS
PWRDN 2
RESET
R51
R52
R53
33h
34h
35h
BIT
4:2
2:0
8:0
6
0
1
2
3
4
5
3
4
CONTREAD
DACPD[2:0]
ALLDACPD
SPDIFRXD
SPDIFTXD
READMUX
SPDIFPD
READEN
PLLAPD
PLLBPD
OSCPD
LABEL
RESET
[2:0]
DEFAULT
111
000
n/a
1
0
1
1
1
1
1
0
0
DAC powerdowns (0 = DAC enabled, 1 = DAC disabled)
DACPD[0] = DAC1
DACPD[1] = DAC2
DACPD[2] = DAC3
Overrides DACPD[3:0]
OSC power down
0 = PLLA enabled
1 = PLLA disabled
0 = PLLB enable
1 = PLLB disable
S/PDIF Clock Recovery PowerDown
S/PDIF Transmitter powerdown
S/PDIF Receiver powerdown
Determines which status register is to be read back:
Continuous Read Enable.
Read-back mode enable.
Writing to this register will apply a reset to the device registers.
0 = Continuous read-back mode disabled
1 = Continuous read-back mode enabled
0 = S/PDIF enabled
1 = S/PDIF disabled
0 = S/PDIF Transmitter enabled
1 = S/PDIF Transmitter disabled
0 = S/PDIF Receiver enabled
1 = S/PDIF Receiver disabled
000 = Error Register
001 = Channel Status Register 1
010 = Channel Status Register 2
011 = Channel Status Register 3
100 = Channel Status Register 4
101 = Channel Status Register 5
110 = S/PDIF Status Register
0 = DACs under control of DACPD[3:0]
1= All DACs are disabled.
0 = OSC enabled
1 = OSC disabled
0 = read-back mode disabled
1 = read-back mode enabled
DESCRIPTION
PD, Rev 4.7, March 2009
WM8580
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