wm9715l Wolfson Microelectronics plc, wm9715l Datasheet - Page 59

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wm9715l

Manufacturer Part Number
wm9715l
Description
Ac?97 Audio And Touchpanel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet

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Production Data
w
INTERFACE TIMING
Test Characteristics:
DBVDD = 3.3V, DCVDD = 3.3V, DGND1 = DGND2 = 0V, T
CLOCK SPECIFICATIONS
Figure 17 Clock Specifications (50pF External Load)
DATA SETUP AND HOLD
Figure 18 Data Setup and Hold (50pF External Load)
Note:
Setup and hold times for SDATAIN are with respect to the AC’97 controller, not the WM9715L.
Note:
3
BITCLK frequency
BITCLK period
BITCLK output jitter
BITCLK high pulse width (Note 1)
BITCLK low pulse width (Note 1)
SYNC frequency
SYNC period
SYNC high pulse width
SYNC low pulse width
Setup to falling edge of BITCLK
Hold from falling edge of BITCLK
Output valid delay from rising edge of
BITCLK
Worst case duty cycle restricted to 45/55
BITCLK
SYNC
PARAMETER
PARAMETER
t
SYNC_HIGH
A
t
CLK_PERIOD
t
= -25°C to +85°C, unless otherwise stated.
CLK_HIGH
t
t
SYNC_PERIOD
t
t
SYMBOL
CLK_PERIOD
SYMBOL
t
SYNC_HIGH
t
SYNC_LOW
CLK_HIGH
CLK_LOW
t
t
SYNC_PERIOD
t
SETUP
HOLD
t
CO
t
CLK_LOW
t
SYNC_LOW
MIN
MIN
36
36
10
10
12.288
PD Rev 4.0 December 2007
81.4
40.7
40.7
20.8
19.5
TYP
TYP
1.3
48
MAX
MAX
750
WM9715L
45
45
15
UNIT
UNIT
MHz
kHz
ns
ps
ns
ns
µs
µs
µs
ns
ns
ns
59

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