tc7mh123afk TOSHIBA Semiconductor CORPORATION, tc7mh123afk Datasheet - Page 6

• Manufacturer Part Number: tc7mh123afk
• Description: Dual Monostable Multivibrator
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Functional Description
(1)
(2)
(3)
(4)
Stand-by state
The external capacitor (Cx) is fully charged to V
triggering, the Q
comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off.
The total supply current is only leakage current.
Trigger operation
Trigger operation is effective in any of the following three cases.
•
•
•
After a trigger becomes effective, comparators C1 and C2 start operating, and Q
external capacitor discharges through Q
voltage level falls to the internal reference voltage Vref L, the output of C1 becomes low. The flip-flop
is then reset and Q
After Q
constant of external capacitor Cx and resistor Rx.
Upon triggering, output Q becomes high, following some delay time of the internal F/F and gates. It
stays high even if the voltage of Rx/Cx changes from falling to rising. When Rx/Cx reaches the
internal reference voltage Vref H, the output of C2 becomes low, the output Q goes low and C2 stops
its operation. That means, after triggering, when the voltage level of the Rx/Cx node reaches Vref H,
the IC returns to its monostable state.
With large values of Cx and Rx, and ignoring the discharge time of the capacitor and internal delays
of the IC, the width of the output pulse, t
Retrigger operation (TC7MH123AFK)
When a new trigger is applied to either input A or B while in the monostable state, it is effective only
if the IC is charging Cx. The voltage level of the Rx/Cx node then falls to Vref L level again. Therefore
the Q output stays high if the next trigger comes in before the time period set by Cx and Rx.
If the new trigger is very close to previous trigger, such as an occurrence during the discharge cycle, it
will have no effect.
The minimum time for a trigger to be effective 2nd trigger, t
Reset operation
In normal operation, the CLR input is held high. If CLR is low, a trigger has no effect because the
Q output is held low and the trigger control F/F is reset. Also, Q
to V
This means if CLR is set low, the IC goes into a wait state.
t
w
CC
B input is high, and the A input has a falling signal
A input is low, and the B input has a rising signal
A input is low and the B input is high, and the CLR input has a rising signal
(OUT) = 1.0 Cx Rx
.
N
turns off, the voltage at the Rx/Cx node starts rising at a rate determined by the time
P
and Q
N
turns off. At that moment C1 stops but C2 continues operating.
N
transistors which are connected to the Rx/Cx node are in the off state. Two
N
w
. The voltage level at the Rx/Cx node drops. If the Rx/Cx
(OUT), is as follows:
6
CC
in the stand-by state. That means, before
rr
(min), depends on V
P
turns on and Cx is charged rapidly
TC7MH123,221AFK
N
is turned on. The
CC
and Cx.
2007-10-19