m24l48512d Elite Semiconductor Memory Technology Inc., m24l48512d Datasheet - Page 8

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m24l48512d

Manufacturer Part Number
m24l48512d
Description
4-mbit 512k X 8 Pseudo Static Ram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
ESMT
Avoid Timing
shorter than tRC during over 15μs at read operation shown as in Abnormal Timing, it requires a normal read timing at leat during
15μs shown as in Avoidable timing 1 or toggle
Abnormal Timing
Avoidable Timing 1
Avoidable Timing 2
Elite Semiconductor Memory Technology Inc.
ESMT Pseudo SRAM has a timing which is not supported at read operation, If your system has multiple invalid address signal
Address
Address
Address
CE1
WE
CE1
WE
CE1
WE
< t
CE
RC
< t
1
RC
to high (≧t
RC
) one time at least shown as in Avoidable Timing 2.
t
15μs
RC
15μs
15μs
t
RC
Publication Date: Jul. 2008
Revision: 1.1
M24L48512DA
8/12

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