le24c043 ON Semiconductor, le24c043 Datasheet
le24c043
Available stocks
Related parts for le24c043
le24c043 Summary of contents
Page 1
... LE24C043 Overview The LE24C043 is a 2-wire serial interface 4k Bit EEPROM. It realizes high speed and a high level reliability by incorporating SANYO’s high performance CMOS EEPROM technology. This device is compatible with I protocol, therefore it is best suited for application that requires small-scale re-writable nonvolatile parameter memory. ...
Page 2
... Package Dimensions unit:mm (typ) 3032E [LE24C043M] 5 (0.6) 1.27 0.35 0.15 SANYO : MFP8(225mil) Pin Assignment GND 4 5 Block Diagram WP SCL SDA LE24C043 Pin Descriptions PIN.1 NC PIN PIN PIN.4 GND PIN.5 SDA SCL PIN.6 SCL SDA PIN.7 WP PIN Write controller ...
Page 3
... AC Electric Characteristics Input pulse level 0.1× 0.9×V DD Input pulse rise / fall time 20ns Output detection voltage 0.5×V DD Output load 50pF+Pull up resistor 3.0kΩ LE24C043 Conditions Below 20ns Conditions Conditions f=400kHz f=400kHz =10ms =GND =GND ...
Page 4
... SCL SDA fall time Bus release time Noise suppression time Write cycle time Bus Timing SCL t SU.STA SDA/IN SDA/OUT Write Timing SCL SDA D0 Write Data Acknowledge LE24C043 Symbol min f SCLS 0 t LOW 1200 t HIGH 600 t AA 100 t DH 100 t SU.STA 600 t HD ...
Page 5
... WP (write protect) pin When the WP pin is high, write protection is enabled, and writing into the all memory areas is prohibited. When the pin is low, writing is possible to all memory areas. Read operations can be performed regardless of the WP pin status. LE24C043 No.1582-5/12 ...
Page 6
... SDA line to low, and sends the acknowledge signal indicating that the data has been received. The acknowledge signal is not sent during an EEPROM internal write operation. SCL (EEPROM input) SDA (Master output) SDA Start (EEPROM output) condition LE24C043 t HD.DAT 1 t SU.STO Stop condition 8 9 Acknowledge bit output ...
Page 7
... If they do not match, the EEPROM returns to standby mode. When a read operation is performed immediately after the slave device has been switched, the random read command must be used. 1 MSB LE24C043 Slave Address Device Code 0 ...
Page 8
... During Write SDA 1 R/W LE24C043 ACK ACK ACK ACK ･･･ ～ ...
Page 9
... As with current address read and random read, the operation is completed by inputting the stop condition without sending an acknowledge signal. Device Address SDA R/W LE24C043 Device Address Data(n+ ACK R/W Word Address(n) Device Address ...
Page 10
... set to strike a good balance between the operating frequency requirements and power consumption assumed that the SDA load capacitance is 50pF and the SDA output data strobe time is 500ns will be about 500ns/50pF = 10kΩ. LE24C043 Dummy clock cycle × ...
Page 11
... This product does not include a slave address pin, but the information for the slave addresses, S1 and S2, are held internally. The slave addresses of this product are set to S1=0, and S2=0 when it is shipped. During device addressing, execute this slave address code after the device code. LE24C043 Symbol min ...
Page 12
... SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of January, 2011. Specifications and information herein are subject to change without notice. LE24C043 V DD =2.7 to 5.5V Symbol min typ t SU ...