le24c043 ON Semiconductor, le24c043 Datasheet - Page 10

• Manufacturer Part Number: le24c043
• Description: Cmos Ic Two Wire Serial Interface Eeprom 4k Eeprom
• Manufacturer: ON Semiconductor

Application Notes
1) Software reset function
2) Pull-up resistor of SDA pin
R PU maximum resistance
R PU minimum value
Recommended R PU setting
A resistance corresponding to the low-level output
voltage (V OL max) of SANYO’s EEPROM must be set.
R PU minimum value = (V DD − V OL )/I OL
Example: When V DD =3.0V, V OL = 0.4V and I OL = 1mA
R PU minimum value = (3.0V − 0.4)/1mA = 2.6kΩ
R PU maximum value = (V DD - V IH )/I L
Example: When V DD =3.0V and I L = 2μA
R PU maximum value = (3.0V − 3.0V × 0.8)/2μA = 300kΩ
R PU is set to strike a good balance between the operating frequency requirements and power consumption. If it is
assumed that the SDA load capacitance is 50pF and the SDA output data strobe time is 500ns, R PU will be about
R PU = 500ns/50pF = 10kΩ.
The maximum resistance must be set in such a way that the bus potential, which is determined by the sum total (I L )
of the input leaks of the devices connected to the SDA bus and by R PU , can completely satisfy the input high level
(V IH min) of the microcontroller and EEPROM. However, a resistance value that satisfies SDA rise time t R and fall
time t F must be set.
Due to the demands of the I
resistance from several kΩ to several tens of kΩ) without fail. The appropriate value must be selected for this
resistance (R PU ) on the basis of the V IL and I IL of the microcontroller and other devices controlling this product as
well as the V OL –I OL characteristics of the product. Generally, when the resistance is too high, the operating
frequency will be restricted; conversely, when it is too low, the operating current consumption will increase.
Software reset (start condition + 9 dummy clock cycles + start condition), shown in the figure below, is executed in
order to avoid erroneous operation after power-on and to reset while the command input sequence. During the
dummy clock input period, the SDA bus must be opened (set to high by a pull-up resistor). Since it is possible for
the ACK output and read data to be output from the EEPROM during the dummy clock period, forcibly entering H
will result in an overcurrent flow.
Note that this software reset function does not work during the internal write cycle.
SDA
SCL
Start condition
2
C bus protocol function, the SDA pin must be connected to a pull-up resistor (with a
1
2
Dummy clock cycle × 9
LE24C043
8
Master
device
I L
9
SDA
Start condition
R PU
C BUS
EEPROM
I L
No.1582-10/12