rt9238 ETC-unknow, rt9238 Datasheet - Page 13

• Manufacturer Part Number: rt9238
• Description: Vrm 8.5 Pwm And Triple Linear Power System Controller
• Manufacturer: ETC-unknow

MOSFET’s on-resistance, R
current for protection against a shorted output. All
linear regulators monitor their respective VSEN pins
for under-voltage to protect against excessive
currents.
Fig.5 illustrates the over-current protection with an
overload on OUT1. The overload is applied at T0 and
the current increases through the inductor (L
time T1, the OC1 comparator trips when the voltage
across
programmed by R
and 3, discharges the soft-start capacitor C
28µA current sink, and increments the counter. Soft-
start capacitor C
starts ramping up at T2 and initiates a new soft-start
cycle. With OUT2 still overloaded, the inductor
current increases to trip the over-current comparator.
Again, this inhibits the outputs, but the C
start voltage continues increasing to above 4.0V
before discharging. Soft-start capacitor C
again, quickly discharged. The counter increments to
2. The soft-start cycle repeats at T3 and trips the
over-current comparator. The SS24 pin voltage
increases to above 4.0V at T4 and the counter
increments to 3. This sets the fault latch to disable
the converter.
DS9238-01 July 2001
10V
0A
0V
4V
2V
0V
Q1
COUNT = 1 COUNT = 2 COUNT = 3
Fig.5 Over-current Operation
T0T1
(i
D
SS13
•R
OCSET
DS(ON)
OVERLOAD
REPORTED
is quickly discharged. C
APPLIED
T2
FAULT
. This inhibits outputs 1, 2,
)
TIME
DS(ON)
exceeds
T3T4
to monitor the
the
SS24
SS24
OUT1
SS13
level
SS13
soft-
). At
with
Preliminary
is,
1. The maximum R
2. The minimum I
3. Determine I
The three linear controllers monitor their respective
VSEN pins for under-voltage. Should excessive
currents cause VSEN3 or VSEN4 to fall below the
linear under-voltage threshold, the respective UV
signals set the OC latch or the FAULT latch,
providing
charged. Blanking the UV signals during the C
charge interval allows the linear outputs to build
above the under-voltage threshold during normal
operation. Cycling the bias input power off then on
resets the counter and the fault latch.
An external resistor (R
current trip level for the PWM converter. As shown in
Fig.6, the internal 200µA current sink (I
develops a voltage across R
referenced to V
over-current comparator (OC). When the voltage
across the upper MOSFET (V
the over-current comparator trips to set the over-
current latch. Both V
V
V
switching. The over-current function will trip at a peak
inductor current (I
The OC trip point varies with MOSFET’s R
temperature variations. To avoid over-current tripping
in the normal operating load range, determine the
ROCSET resistor value from the equation above
with:
where ∆I is the output inductor ripple current.
For an equation for the ripple current see the section
under component guidelines titled ‘Output Inductor
Selection’.
IN
OCSET
temperature
and a small capacitor across R
I
track the variations of V
PEAK
respective
PEAK
=
I
IN
OCSET
OCSET
PEAK
. The DRIVE signal enables the
for I
DS(ON)
R
SET
) determined by:
DS
PEAK
×
from the specification table
C
OCSET
(
R
ON
SS
and V
OCSET
)
at the highest junction
> I
DS(ON)
) programs the over-
capacitors
OUT(MAX)
OCSET
DS
www.richtek-ic.com.tw
IN
are referenced to
due to MOSFET
) exceeds V
RT9238
(V
OCSET
SET
+ (∆I)/ 2,
are
) that is
OCSET
DS(ON)
helps
SET
fully
13
SS
)
,