that5171 THAT Corporation, that5171 Datasheet - Page 13

• Manufacturer Part Number: that5171
• Description: High-performance Digital Preamplifier Controller Ic
• Manufacturer: THAT Corporation

THAT5171 High-Performance
Digital Preamplifier Controller IC
Chip ID Register (R[2:0] = 000)
version and revision. It consists of a 6-bit Chip code
and a 2-bit Revision code, shown in Tables 7-9. The
first version of the 5171 returns hex 0x84 (CHIPID =
binary 100001; REV 00).
Gain Register (R[2:0] = 001)
register. The value of the GAIN register may be 0, or
any value in the range 8 to 63 (decimal) as shown in
Table 10. Note that read-only (RO) bits must be writ-
ten as zeros. The actual gain setting is 5.6dB higher
than the value in the GAIN register.
written to the GAIN register, the current gain setting
will not be changed and the ERR bit in the
CONTROL/STATUS register will be set until a valid
value is written.
GPO Register (R[2:0] = 010)
the general purpose output pins. A logic 0 in any of
the GPO[3:0] bits sets that port low. A logic 1 sets a
port high. During reset, the GPO pins are configured
as inputs and the device address is read on
GPO[2:0]. THAT Corporation intends to offer fea-
tures in future versions of the 5171 that will be con-
figured via a pull up/down resistor on GPO3. To
ensure compatibility with new versions of the chip,
GPO3 should be pulled low with a 1-10 kΩ resistor
on designs before these new features become avail-
able. After reset, the GPO pins are configured as out-
puts and are available for general use. Note that
reading the GPO register returns the GPO[3:0] regis-
ter bits, not the logic levels of the GPO pins during
reset.
Control/Status Register (R[2:0] = 011)
mode of the chip and returns current chip status.
Meaning
REV[1:0]
Type
Bit #
The read-only Chip ID register identifies the chip
Gain of the 5171 is represented by the 6-bit GAIN
Values 1 to 7 are not allowed. If an illegal value is
The GPO register (Table 11) controls the state of
The CONTROL/STATUS register controls the
CH[5:0]
100001
00
01
10
11
CH5
RO
7
Table 7. Chip ID Register.
THAT5171 Digital Preamplifier Controller
Table 9. Chip Revision.
CH4
RO
6
Table 8. Chip ID.
CH3
RO
5
Tel: [phone]; Fax: [phone]; Web: www.thatcorp.com
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
CH2
RO
Chip Revision
4
Chip Field
Revision 0
Revision 1
Revision 2
Revision 3
Copyright © 2009, THAT Corporation; All rights reserved.
CH1
RO
3
CH0
RO
2
REV1
RO
1
REV0
RO
0
Page 13 of 20
During a write to this register, the read-only bits
must be written as zeros. The register fields are
defined in Table 12, and the bitfields are described
in Table 13.
Meaning
Meaning
Reset
Reset
Type
Type
Bit #
Bit #
Gain [5:0]
MODE[1:0]
Reserved
Reserved
Reserved
Reserved
000000
000001
000010
000011
000100
000101
000110
000111
001000
001001
111110
111111
RESET
Bit(s)
ERR
BSY
...
Table 13. Control/Status Register Bits.
RO
BSY
RO
X
Table 12. Control/Status Register.
7
0
7
0
RO
Rsvd
Table 11. GPO Register.
RO
Value (decimal)
Table 10. Gain Register.
6
X
0
Gain control mode
00 - Immediate gain updates
01 - Gain update on zero crossings
10 - Reserved
11 - Reserved
Unused
Unused
Unused
Gain Error
0 - No error
1 - Error
If an illegal value is written to the GAIN
register, it is ignored and the ERR bit is
set until a valid gain value is written.
Unused
Busy
0 - Not busy, the switched resistors have
been updated by the value in the GAIN
register
1 - Busy, a change to the switched resis-
tors is pending a zero-crossing.
Gain Register
6
0
RO
illegal
illegal
illegal
illegal
illegal
illegal
illegal
X
ERR
5
0
RO
5
0
62
63
...
0
8
9
0
RO
4
X
0
Rsvd
RO
4
0
Document 600133 Rev 02
Description
GPO
RW
3
3
0
Rsvd
RO
3
0
Actual Gain (dB)
GPO
RW
Rsvd
RW
2
2
0
unchanged
unchanged
unchanged
unchanged
unchanged
unchanged
unchanged
2
0
13.6
14.6
67.6
68.6
5.6
5.6
...
GPO
Mode
RW
RW
1
1
0
1
1
0
GPO
Mode
RW
RW
0
0
0
0
0
0