that5171 THAT Corporation, that5171 Datasheet - Page 6

• Manufacturer Part Number: that5171
• Description: High-performance Digital Preamplifier Controller Ic
• Manufacturer: THAT Corporation

Document 600133 Rev 02
Maximizing Dynamic Range
5171 were chosen after careful consideration of the
dynamic range available from the 1570 and similar
designs. In particular, the unusual choice of 5.6dB
was based on the available output headroom plus
our objective to preserve as much dynamic range as
possible. This led us to eschew the “round number”
of 6.0dB; while the round number would make for
simpler calculations, it would have compromised
dynamic range by ~0.5dB.
5171/1570 combination will be followed by one of
two things. First would be an attenuator network
which drops the +26.6dBu max (differential) output
level (assuming ±15V rails) to one compatible with
the input of an A/D converter. Alternatively, there
might be an attenuating differential amplifier which
converts the circuit’s differential output to single-
ended. In either case, nice “round” numbers for the
system gain are easily achieved by changing the ana-
log attenuation in these networks. See DN140 “Input
and Output Circuits for THAT Preamplifier ICs” for
circuits and ideas.
Accommodating High Signal Levels
accommodate full professional-audio signal levels.
Accordingly, it is fabricated in a high-voltage CMOS
process which allows operation from up to ±17V
analog power supplies. Along with proprietary (and
patent-pending) drive circuitry to the switching FETs,
this permits low-distortion operation at signal levels
up to over +22dBu in, and nearly +27dBu out. See
also DN140 for more discussion and ideas.
Switching Noise
mize switching noise during gain changes. Special
(patent pending) circuitry slows down the FET gate
drive to minimize charge injection. This helps sup-
press clicks when changing gain. As well, the FET
switches are implemented in a balanced fashion so
as to maintain equal perturbation to the positive and
negative sides of the balanced signal path.
restrict gain changes to times when the analog signal
is very close to zero. The detector monitors the dif-
ferential signal present between the IN
of the 5171. When enabled, it permits gain changes
to take place only when the signal is within ±5mV. A
timeout (set by external components R
ures 3~6) ensures that a gain change will always
occur at the expiration of the timeout, in case the sig-
nal has not gotten within the voltage window by that
time.
zero-crossings will occur every 25ms. Accordingly,
THAT recommends that the timeout be set to less
than or equal to 25ms in order to ensure that gain
changes will be made at zero-crossings unless there
is some unusual low-frequency signal present. 22mS
The gain (actually attenuation) settings in the
We anticipate that in almost all cases, the
One key objective of the 5171 design was to
The 5171 includes several features which mini-
A built-in zero-crossing detector can be used to
The period of a 20Hz waveform is 50ms and thus
Tel: [phone]; Fax: [phone]; Web: www.thatcorp.com
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
Copyright © 2009, THAT Corporation; All rights reserved.
T
1
and C
and IN
T
2
in fig-
pins
Page 6 of 20
is the time constant shown in the application sche-
matics. Of course, for special applications, the
designer may choose to disable the zero-crossing
detection and force immediate gain changes without
regard to the signal condition.
changes are very quiet – barely audible when per-
formed in the absence of program, and all but inau-
dible with program material present.
Servo and DC Offsets
servo amplifier which minimizes dc offset at the out-
put. Practically, it is impossible to ensure that the
input offset voltage of the analog gain stage is low
enough to maintain low output dc offset at high
gains. (For <10mV output offset, the input offset at
~60dB gain would have to be under 10μV!) On the
other hand, it is not too difficult to make amplifiers
with under 1.5mV input offset. By using such an
amplifier in feedback around the analog gain stage, it
is possible to generate a correction voltage that main-
tains low output offset from the circuit as a whole.
under 1.5mV input offset voltage. It requires two
large non-polar capacitors in feedback around each
half of the amp to form an integrator. The integra-
tor’s input is connected to the gain stage’s output,
and the integrator’s output is applied to the gain
stage’s input. As the loop settles, the gain stage’s out-
put will be driven to the input offset voltage of the
servo. The loop time constant must be set long
enough so as not to interfere with low audio-
frequency signals.
(C
1570 (R
and the servo, form a 2nd order highpass filter
whose characteristics change with the gain setting.
The Q of this filter is highest at the highest gain set-
ting. (At low gains, the behavior is governed almost
entirely by the input coupling network and bias resis-
tors, since the poles split and the one related to the
servo moves very low.) Assuming 1.2kΩ for R
R
Q to be about .63 (for approximately Butterworth
response) if we choose C
ues of C
resistors (R
resistors (R
tion from the servo amp. Reducing R
lower the Q, while increasing them will raise the Q,
proportional to the square-root of resistance.
quency, f
gain, K=1+(R
and the source impedance is less than 1kΩ.
2
4
, and 1.2MΩ for R
With the zero-crossing feature enabled, gain
The 5171 also includes an integrated differential
The integrated differential servo amplifier has
The combination of the input coupling capacitors
We recommend a 1000:1 ratio between servo feed
Mathematically, we can express the cutoff fre-
f
Q =
and C
o
=
4
1
2 f
2
0
and C
and R
5
, and the Q as:
in Figures 3~6), the bias resistors for the
0
1
7
G
G
1
and R
1
and R
7
20k C
R
/R
5
2
.
1
7
– which form a load for C
1
20k C
), R
1
2
) to minimize any noise contribu-
8
7
) to the analog gain stage bias
13
1
Digital Preamplifier Controller IC
and R
=R
K
4
12
C
, where G is the preamp
THAT5171 High-Performance
2
13
, R
and C
8
, we can set the highest
, and
7
=R
13
8
, C
to be 1/2 the val-
4
=C
7
and R
5
, C
4
and C
12
1
8
=C
and
will
5
13
),
,