74LVC2G08DC,125 NXP Semiconductors, 74LVC2G08DC,125 Datasheet - Page 11

• Manufacturer Part Number: 74LVC2G08DC,125
• Description: IC DUAL 2-IN GATE 8VSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCr

Specifications of 74LVC2G08DC,125

• Number Of Circuits: 2
• Package / Case: US8, 8-VSSOP
• Logic Type: AND Gate
• Number Of Inputs: 2
• Current - Output High, Low: 32mA, 32mA
• Voltage - Supply: 1.65 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Product: AND
• Logic Family: LVC
• High Level Output Current: - 32 mA
• Low Level Output Current: 32 mA
• Propagation Delay Time: 2.1 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Package: 8VSSOP
• Logic Function: AND
• Minimum Operating Supply Voltage: 1.65 V
• Maximum Operating Supply Voltage: 5.5 V
• Maximum Propagation Delay Time @ Maximum Cl: 2.5(Typ)@2.7V|2.1(Typ)@3V to 3.6V|1.7(Typ)@4.5V to 5.5V ns
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3257-2; 74LVC2G08DC-G; 935274766125

NXP Semiconductors
Fig 11. Package outline SOT765-1 (VSSOP8)
74LVC2G08
Product data sheet
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT765-1
max.
A
1
0.15
0.00
A 1
8
1
Z
0.85
0.60
A 2
y
IEC
e
0.12
A 3
pin 1 index
D
0
0.27
0.17
b p
b p
All information provided in this document is subject to legal disclaimers.
MO-187
0.23
0.08
5
JEDEC
4
c
w
REFERENCES
D
2.1
1.9
M
Rev. 9 — 20 October 2010
(1)
E
2.4
2.2
(2)
c
JEITA
scale
2.5
0.5
e
A
H E
3.2
3.0
A 2
detail X
A 1
0.4
L
H E
E
0.40
0.15
L p
0.21
0.19
Q
5 mm
L
L p
PROJECTION
EUROPEAN
Q
0.2
v
A
(A 3 )
0.13
74LVC2G08
w
Dual 2-input AND gate
X
θ
v
M
0.1
y
© NXP B.V. 2010. All rights reserved.
A
ISSUE DATE
02-06-07
Z
0.4
0.1
(1)
SOT765-1
8°
0°
θ
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