ox16c954 ETC-unknow, ox16c954 Datasheet - Page 12

• Manufacturer Part Number: ox16c954
• Description: High Performance Quad Uart With 128-byte Fifos Intel / Motorola Bus Interface
• Manufacturer: ETC-unknow

Data Sheet Revision 1.0
OXFORD SEMICONDUCTOR LTD.
TQFP
Serial Port Pins Contd.
79
62
39
22
79
62
39
22
2
59
42
19
3
58
43
18
3
58
43
18
Interrupt & DMA Pins
1
61
41
21
55
80
60
40
20
54
PLCC
60
44
26
10
60
44
26
10
61
43
27
9
62
42
28
8
62
42
28
8
No pin
No pin
No pin
No pin
39
No pin
No pin
No pin
No pin
38
Dir
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
O
O
O
O
O
O
O
O
O
O
1
Name
DSR[3]#
DSR[2]#
DSR[1]#
DSR[0]#
RxClkIn[3]
RxClkIn[2]
RxClkIn[1]
RxClkIn[0]
DCD[3]#
DCD[2]#
DCD[1]#
DCD[0]#
RI[3]#
RI[2]#
RI[1]#
RI[0]#
Ext_CK[3]
Ext_CK[2]
Ext_CK[1]
Ext_CK[0]
TXRDY3#
TXRDY2#
TXRDY1#
TXRDY0#
TXRDY#
RXRDY3#
RXRDY2#
RXRDY1#
RXRDY0#
RXRDY#
Description
Active-low modem “data-set-ready” input, for each uart respectively.
If automated DSR# flow control is enabled for the corresponding UART
channel, upon deassertion of the channel’s DSR# pin, the transmitter will
complete the current character and enter the idle mode until the DSR# pin
is reasserted. Note: flow control characters are transmitted regardless of
the state of the DSR# pin. The state of this pin is reflected in bit 5 of the
MSR.
It can also be used as a general-purpose input.
External receiver clock for isochronous applications for each uart
respectively. Selected when CKS[1:0] = ‘01’.
Active-low modem Data-Carrier-Detect input, for each uart respectively.
The state of this pin is reflected in bit 7 of the MSR. It can also be used
as a general-purpose input.
Active-low modem Ring-Indicator input, for each uart respectively.
The state of this pin is reflected in bit 6 of the MSR. It can also be used
as a general-purpose input. RI can be configured as tx and rx for a 1x
clock in isochronous operation.
External transmitter clock for each uart respectively. This clock can be
used by the transmitter (and by the receiver indirectly) when CKS[6] = ‘1’.
Signal for the DMA transfer of transmitter data, for Uart 3.
Signal for the DMA transfer of transmitter data, for Uart 2.
Signal for the DMA transfer of transmitter data, for Uart 1.
Signal for the DMA transfer of transmitter data, for Uart 0.
There are two modes of DMA signalling described in section 8.1
Signal for the DMA transfer of transmitter data.
This pin is the wire ”OR-ed” function of the TXRDY# signals of all
channels.
Signal for the DMA transfer of receiver data, for Uart 3.
Signal for the DMA transfer of receiver data, for Uart 2.
Signal for the DMA transfer of receiver data, for Uart 1.
Signal for the DMA transfer of receiver data, for Uart 0.
There are two modes of DMA signalling described in section 8.1
Signal for DMA transfer of received data.
This pin is the wire ”OR-ed” function of the RXRDY# signals of all
channels.
OX16C954 rev B
Page 12