ht82a836r Holtek Semiconductor Inc., ht82a836r Datasheet - Page 17

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ht82a836r

Manufacturer Part Number
ht82a836r
Description
Usb Audio Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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HT82A836R
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I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC, PDC, PEC and PFC, to control the input/output
configuration. With this control register, each CMOS
output or input with or without pull-high resistor struc-
tures can be reconfigured dynamically under software
control. Each of the I/O ports is directly mapped to a bit
in its associated port control register.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as a CMOS output. If the pin is currently setup
as an output, instructions can still be used to read the
output register. However, it should be noted that the pro-
gram will in fact only read the status of the output data
latch and not the actual logic status of the output pin.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
Rev. 1.00
Serial Interface
The serial interface pins SDO, SDI, SCS and SCK are
pin-shared with the I/O pins PC4, PC5, PC6 and PC7.
For applications not requiring serial interface, the
pin-shared pins can be used as a normal I/O pin.
External Interrupt
The external interrupt pin INT is pin-shared with the
I/O pin PE7. For applications not requiring an external
interrupt input, the pin-shared external interrupt pin
can be used as a normal I/O pin, however to do this,
the external interrupt enable bits in the MFI1C register
must be disabled.
Port A Wake-up
17
I/O Pin Structures
The following diagrams illustrate the I/O pin internal
structures. As the exact logical construction of the I/O
pin may differ from these drawings, they are supplied as
a guide only to assist with the functional understanding
of the I/O pins.
External Timer/Event Counter Input
The external timer pins TMR0/TMR1 are pin-shared
with the I/O pins PC1/PC2. If these shared pins are to
be used as a Timer/Event Counter inputs, then the
Timer/Event Counter must be configured to be in the
Event Counter or Pulse Width Measurement Mode.
This is achieved by setting the appropriate bits in the
relevant timer/Event Counter Control Register. The
pin must also be setup as an input by setting the ap-
propriate bit in the Port Control Register Pull-high re-
sistor options can also be selected via the appropriate
port pull-high configuration option. If the shared pin is
to be used as a normal I/O pin, then the external timer
input function must be disabled, by ensuring that the
corresponding Timer/Event Counter is configured to
be in the Off Mode or Timer Mode.
PFD Output
The device contains a PFD function whose single out-
put is pin-shared with PC0. The output function of this
pin is chosen via software. Note that the correspond-
ing bit of the port control register, PCC.0, must setup
the pin as an output to enable the PFD output. If the
PCC port control register has setup the pin as an in-
put, then the pin will function as a normal logic input
with the usual pull-high option, even if the PFD config-
uration option has been selected.
SPI Interface
The device contains an internal SPI interface whose
pins are shared with I/O pins PC4~PC7. The SPI In-
terface control register, SBCR, is used to determine if
these pins are to be used as normal I/O pins or as SPI
Interface pins.
HT82A836R
March 20, 2008

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