isplsi2032v-80lt44 Lattice Semiconductor Corp., isplsi2032v-80lt44 Datasheet - Page 9

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isplsi2032v-80lt44

Manufacturer Part Number
isplsi2032v-80lt44
Description
3.3v High Density Programmable Logic
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1. NC pins are not to be connected to any active signals, VCC or GND.
I/O 0 - I/O 3
I/O 4 - I/O 7
I/O 8 - I/O 11
I/O 12 - I/O 15
I/O 16 - I/O 19
I/O 20 - I/O 23
I/O 24 - I/O 27
I/O 28 - I/O 31
GOE 0
Y0
RESET/Y1
ispEN
TDI/IN 0
TMS/NC
TDO/IN 1
TCK/Y2
GND
VCC
Pin Description
NAME
1
PLCC PIN NUMBERS
15,
19,
25,
29,
37,
41,
3,
7,
2
11
35
13
14
36
24
33
1,
12,
23
34
16,
20,
26,
30,
38,
42,
4,
8,
17,
21,
27,
31,
39,
43,
5,
9,
18,
22,
28,
32,
40,
44,
6,
10
Global Output Enable input pin.
Input — When in ISP Mode, controls operation of ISP state-machine.
Input/Output Pins — These are the general purpose I/O pins used by the logic array.
Dedicated Clock input. This clock input is connected to one of the clock inputs of all the
GLBs on the device.
This pin performs two functions:
- Dedicated clock input. This clock input is brought into the Clock Distribution
- Active Low (0) Reset pin which resets all of the GLB and I/O registers
Input — Dedicated in-system programming Boundary Scan Enable input pin. This pin is
brought low to enable the programming mode. The TMS, TDI, TDO and TCK controls
become active.
Input — This pin performs two functions. When ispEN is logic low, it functions as an input
pin to load programming data into the device. TDI/IN0 also is used as one of the two
control pins for the isp state machine. When ispEN is high, it functions as a dedicated
input pin.
Output/Input — This pin performs two functions. When ispEN is logic low, it functions as
an output pin to read serial shift register data. When ispEN is high, it functions as a
dedicated input pin.
Input — This pin performs two functions. When ispEN is logic low, it functions as a clock
pin for the Serial Shift Register. When ispEN is high, it functions as a dedicated clock
input.This clock input is brought into the Clock Distribution Network, and can optionally be
routed to any GLB and/or I/O cell on the device.
Ground (GND)
V
CC
Network, and can optionally be routed to any GLB and/or I/O cell on the device.
in the device.
9
Specifications ispLSI 2032V
DESCRIPTION
Table 2-0002A/2032V

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