m52s16161a Elite Semiconductor Memory Technology Inc., m52s16161a Datasheet - Page 26

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m52s16161a

Manufacturer Part Number
m52s16161a
Description
512k X 16bit X 2banks Mobile Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
ESMT
Self Refresh Entry & Exit Cycle
C L O C K
*Note: TO ENTER SELF REFRESH MODE
Elite Semiconductor Memory Technology Inc.
A 1 0 / A P
C A S
A D D R
D Q M
R A S
C K E
W E
B A
D Q
C S
TO EXIT SELF REFRESH MODE
1. CS , RAS & CAS with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don’t care except for CKE.
3. The device remains in self refresh mode as long as CKE stays “Low”.
4. System clock restart and be stable before returning CKE high.
5. CS Starts from high.
6. Minimum t
7. 2K cycles of burst auto refresh is required immediately before self refresh entry and immediately after self refresh
0
cf.) Once the device enters self refresh mode, minimum t
exit.
S e l f R e f r e s h E n t r y
1
* N o t e 1
t
S S
2
RC
H i - Z
* N o t e 2
is required after CKE going high to complete self refresh exit.
3
4
5
6
*Note3
7
8
9
* N o t e 4
10
H i - Z
S e l f R e f r e s h E x i t
RAS
11
is required before exit from self refresh.
* N o t e 5
12
13
t
R C m i n
14
* N o t e 6
A u t o R e f r e s h
Revision : 1.6
Publication Date : May 2009
15
M52S16161A
* N o t e 7
16
17
: D o n ' t c a r e
18
19
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