afct-57d5anpz Avago Technologies, afct-57d5anpz Datasheet
afct-57d5anpz
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afct-57d5anpz Summary of contents
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... GBd Fibre Channel specifications without the need for Rate Select. The AFCT-57D5ANPZ will ignore both Rate Select pin and control bit inputs (ie. no connect inside the SFP). This ...
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... Faults (TX_FAULT), and monitor for Receiver Loss of Signal (RX_LOS). Installation The AFCT-57D5ANPZ can be installed in any SFF-8074i compliant Small Form Pluggable (SFP) port regardless of host equipment operating status. The AFCT-57D5ANPZ is ...
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... Transmit Disable (Tx_Disable) The AFCT-57D5ANPZ accepts a TTL and CMOS compat- ible transmit disable control signal input (pin 3) which shuts down the transmitter optical output. A high signal ...
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... Functional Data I/O The AFCT-57D5ANPZ interfaces with the host circuit board through twenty I/O pins (SFP electrical connector) identified by function in Table 2. The board layout for this ...
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... FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The AFCT-57D5ANPZ’s compliance to these standards is detailed in Table 1. The metal housing and shielded design ...
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Tx_DISABLE Tx_FAULT SERDES IC PROTOCOL IC LOSS OF SIGNAL 4 kΩ MODULE DETECT SCL SDA Figure 2. Typical application configuration 0.1 µ 0.1 µF 10 µF SFP MODULE HOST BOARD NOTE: ...
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Table 2. Pin Description Pin Name Function/Description 1 VeeT Transmitter Ground 2 TX_FAULT Transmitter Fault Indication – High indicates a fault condition 3 TX_DISABLE Transmitter Disable – Module electrical input disables on high or open 4 MOD-DEF2 Module Definition 2 – Two wire serial ID interface data line (SDA) 5 MOD-DEF1 Module Definition 1 – Two wire serial ID interface clock line (SCL) 6 MOD-DEF0 Module Definition 0 – Grounded in module (module present indicator) 7 No Connect Internal pull up 30K Ω to VCC 8 RX_LOS Loss of Signal – High indicates loss of received optical signal 9 No Connect Internal pull up 30K Ω to VCC 10 VeeR Receiver Ground 11 VeeR Receiver Ground ...
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Table 3. Absolute Maximum Ratings Parameter Storage Temperature Case Operating Temperature Relative Humidity Supply Voltage Low Speed Input Voltage N otes; 1. Absolute Maximum Ratings are those values beyond which damage to the device may occur if these limits are exceeded for other than a short period of time. See Reliability Data Sheet for specific reliability performance. 2. Between Absolute Maximum Ratings and the Recommended Operating Conditions functional performance is not intended, device reliability is not implied, and damage to the device may occur over an extended period of time. 3. The module supply voltages, V T and Table 4. Recommended Operating Conditions Parameter Case Operating Temperature Supply Voltage Data Rate N otes: 1. The Ambient Operating Temperature limitations are based on the Case Operating Temperature limitations and are subject to the host system thermal design. ...
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Table 6. Transmitter and Receiver Electrical Characteristics (T = -10°C to 85°C, VccT, VccR = 3.3 V ±10%) C Parameter High Speed Data Input: Transmitter Differential Input Voltage (TD +/-) High Speed Data Output: Receiver Differential Output Voltage (RD +/-) Receiver Contributed Total Jitter (8.5 Gb/s) Receiver Contributed Total Jitter (4.25 Gb/s) Receiver Contributed Total Jitter (2.125 Gb/s) Notes: ...
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Table 7. Transmitter Optical Characteristics (T = -10°C to 85°C, VccT, VccR = 3.3V ±10%) C Parameter Modulated Optical Output Power (OMA) (Peak-to-Peak) Average Optical Output Power Center Wavelength -20 dB Spectral Width Side Mode Suppression Optical Rise/Fall Time (8.5 Gb/s) RIN (OMA) 12 Transmitter Contributed Total Jitter (8.5 Gb/s) Transmitter Contributed Total Jitter (4.25 Gb/s) Transmitter Contributed Total Jitter (2.125 Gb/s) Pout TX_DISABLE Asserted Notes: 1. Max Pout is the lesser of Class 1 safety limits (CDRH and EN 60825) or receiver power, max. 2. Into single-mode optical fiber. ...
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Table 9. Transceiver DIAGNOSTIC Timing Characteristics (T = -10°C to 85°C, VccT, VccR = 3.3 V ±10%) C Parameter Hardware TX_DISABLE Assert Time Hardware TX_DISABLE Negate Time Time to initialize, including reset of TX_FAULT Hardware TX_FAULT Assert Time Hardware TX_DISABLE to Reset Hardware RX_LOS Deassert Time Hardware RX_LOS Assert Time Software TX_DISABLE Assert Time Software TX_DISABLE Negate Time Software Tx_FAULT Assert Time Software Rx_LOS Assert Time Software Rx_LOS Deassert Time Analog parameter data ready Serial bus hardware ready Serial Bus Buffer Time Write Cycle Time Serial ID Clock Rate Notes: 1. Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal. 2. ...
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Table 10. Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics (T = -10°C to 85°C, VccT, VccR = 3.3 V ±10%) C Parameter Transceiver Internal Temperature Accuracy Transceiver Internal Supply Voltage Accuracy Transmitter Laser DC Bias Current Accuracy Transmitted Average Optical Output Power Accuracy Received Average Optical Input Power Accuracy V T,R > 2. ...
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... Addresses 63 and 95 are checksums calculated (per SFF-8472 and SFF-8074) and stored prior to product shipment. 5. Addresses 68-83 specify the AFCT-57D5ANPZ ASCII serial number and will vary on a per unit basis. 6. Addresses 84-91 specify the AFCT-57D5ANPZ ASCII date code and will vary on a per date code basis. 13 ...
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... Received average optical power (Rx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 µW. 6. Bytes 56-94 are not intended for use with AFCT-57D5ANPZ, but have been set to default values per SFF-8472. 7. Byte 95 is a checksum calculated (per SFF-8472) and stored prior to product shipment. ...
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... Notes: 1. The response time for soft commands of the AFCT-57D5ANPZ is 100 msec as specified by the MSA SFF-8472. 2. Bit 6 is logic OR’d with the SFP TX_DISABLE input pin 3 ... either asserted will disable the SFP transmitter. ...
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... DEVICE SHOWN WITH DUST CAP AND BAIL DELATCH 6.25 – 0. Figure 5. Module drawing. 16 55.3 – 0.2 13.6 1.91 1.39 UNCOMPRESSED 12.4 – 0.2 0.55 UNCOMPRESSED 13.6 14.9 UNCOMPRESSED AFCT-57D5ANPZ 1310nm LASER PROD 21CRF(J) CLASS1 13.4 – 0.1 CHINA 0445 SN: A30445CD1C 8.5 – 0.1 ...
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X Y 10x 16.25 MIN. PITCH B PCB EDGE 5.68 8.58 11.08 16.25 REF . 14.25 2.0 11x 3 5 3.2 0.9 20 PIN 1 10.93 9.6 0.8 TYP 1.55 ± 0.05 ∅ 0 ...
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... For product information and a complete list of distributors, please go to our website: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2005-2010 Avago Technologies Limited. All rights reserved. ...