afct-57d5anpz Avago Technologies, afct-57d5anpz Datasheet - Page 11

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afct-57d5anpz

Manufacturer Part Number
afct-57d5anpz
Description
Digital Diagnostic Sfp Small Form Pluggable , Low Voltage 3.3 V 25km, 1310nm Dfb, 8.5/4.25/2.125 Gbd Fibre Channel Rohs Compliant Digital Diagnostic Optical Transceiver
Manufacturer
Avago Technologies
Datasheet
Table 9. Transceiver DIAGNOSTIC Timing Characteristics
(T
Parameter
Hardware TX_DISABLE Assert Time 
Hardware TX_DISABLE Negate Time 
Time to initialize, including reset of TX_FAULT 
Hardware TX_FAULT Assert Time 
Hardware TX_DISABLE to Reset 
Hardware RX_LOS Deassert Time 
Hardware RX_LOS Assert Time 
Software TX_DISABLE Assert Time 
Software TX_DISABLE Negate Time 
Software Tx_FAULT Assert Time 
Software Rx_LOS Assert Time 
Software Rx_LOS Deassert Time 
Analog parameter data ready 
Serial bus hardware ready 
Serial Bus Buffer Time 
Write Cycle Time 
Serial ID Clock Rate 
Notes:
1.  Time from rising edge of TX_DISABLE to when the optical output falls below 10% of nominal.
2.  Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90% of nominal.
3.  Time from power on or falling edge of Tx_Disable to when the modulated optical output rises above 90% of nominal.
4.  From power on or negation of TX_FAULT using TX_DISABLE.
5.  Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.
6.  Time from loss of optical signal to Rx_LOS Assertion.
7.  Time from valid optical signal to Rx_LOS De-Assertion.
8.  Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of nominal. Measured 
 9.  Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises above 90% of nomi-
10.  Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.
11.  Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.
12.  Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.
13.  From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.
14.  Time from power on until module is ready for data transmission over the serial bus (reads or writes over A0h and A2h).
15.  Time from stop bit to completion of a 1-8 byte write command.
16. Time between STOP and START Commands.
11
C
= -10°C to 85°C, VccT, VccR = 3.3 V ±10%)
from falling clock edge after stop bit of write transaction.
nal.
Symbol
t_off 
t_on 
t_init 
t_fault 
t_reset 
t_loss_on 
t_loss_off 
t_off_soft 
t_on_soft 
t_fault_soft 
t_loss_on_soft 
t_loss_off_soft 
t_data 
t_serial 
t_buf 
t_write 
f_serial_clock 
Minimum
10 
20 
Maximum
10 
1 
300 
100 
100 
100 
100 
100 
100 
100 
100 
1000 
300 
10 
100 
Unit
µs 
ms 
ms 
µs 
µs 
µs 
µs 
ms 
ms 
ms 
ms 
ms 
ms 
ms 
µs 
ms 
kHz 
Notes
Note 1
Note 2
Note 3
Note 4
Note 5
Note 6
Note 7
Note 8
Note 9
Note 10
Note 11
Note 12
Note 13
Note 14
Note 16
Note 15

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