lc5256mv Lattice Semiconductor Corp., lc5256mv Datasheet - Page 32

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lc5256mv

Manufacturer Part Number
lc5256mv
Description
3.3v, 2.5v And 1.8v In-system Programmable Expanded Programmable Logic Device Xpld? Family
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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ispXPLD 5000MX Family Internal Switching Characteristics
Lattice Semiconductor
In/Out Delays
t
t
t
t
t
t
t
Routing Delays
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
IN
GCLK_IN
RST
GOE
BUF
EN
DIS
ROUTE
INREG
PTSA
FBK
GCLK
BCLK
PTCLK
PLL_DELAY
BSR
PTSR
LPTOE
SPTOE
OSA
PTOE
PDB
PDI
Parameter
Input Buffer Delay
Global Clock Input
Buffer Delay
Global RESET Pin
Delay
Global OE Pin
Delay
Delay through
Output Buffer
Output Enable Time
Output Disable
Time
Delay through SRP
Input Buffer to
Macrocell Register
Delay
Product Term
Sharing Array Delay
Internal Feedback
Delay
Global Clock Tree
Delay
Block PT Clock
Delay
Macrocell PT Clock
Delay
Programmable PLL
Delay Increment
Block PT Reset
Delay
Macrocell PT Set/
Reset Delay
Macrocell PT OE
Delay
Segment PT OE
Delay
Output Sharing
Array Delay
Global PT OE Delay
5-PT Bypass
Propagation Delay
Macrocell
Propagation Delay
Description
Over Recommended Operating Conditions
Parameter
Base
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
-4
0.70
0.40
3.77
1.98
1.16
2.52
1.92
1.95
0.60
0.50
0.19
0.52
0.12
0.12
0.30
0.72
0.60
0.83
0.83
0.80
0.83
0.20
0.50
32
-45
0.91
0.35
4.24
2.66
1.30
2.84
2.40
2.06
0.60
0.50
0.02
0.32
0.14
0.14
0.30
0.81
0.75
1.19
1.19
0.90
1.04
0.23
0.93
ispXPLD 5000MX Family Data Sheet
-5
0.96
0.35
4.71
2.34
1.45
3.16
2.40
2.34
0.60
0.53
0.39
0.72
0.15
0.15
0.30
0.90
0.75
1.04
1.04
1.00
1.04
0.25
0.72
-52
1.11
0.35
4.71
2.87
1.60
3.63
2.40
2.24
0.47
0.83
0.03
0.82
0.15
0.15
0.30
0.94
0.75
1.52
1.52
1.00
1.04
0.25
0.72
-75
1.30
0.55
7.07
3.27
2.17
4.23
3.60
3.66
1.63
1.34
0.60
0.78
0.23
0.23
0.30
1.35
1.13
1.31
1.31
1.50
1.56
0.38
1.04
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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