lc5256mv Lattice Semiconductor Corp., lc5256mv Datasheet - Page 43

no-image

lc5256mv

Manufacturer Part Number
lc5256mv
Description
3.3v, 2.5v And 1.8v In-system Programmable Expanded Programmable Logic Device Xpld? Family
Manufacturer
Lattice Semiconductor Corp.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LC5256MV
Manufacturer:
LATTICE
Quantity:
22
Part Number:
lc5256mv-4F256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc5256mv-4FN256-5I
Manufacturer:
LATTICE
Quantity:
20 000
Part Number:
lc5256mv-4FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc5256mv-5F256-75I
Manufacturer:
LATTICE/莱迪斯
Quantity:
20 000
Part Number:
lc5256mv-5F256C
Manufacturer:
LATTICE
Quantity:
257
Part Number:
lc5256mv-5F256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc5256mv-5F256C
Manufacturer:
LATTICE
Quantity:
20 000
Part Number:
lc5256mv-5F256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc5256mv-5FN256-75I
Manufacturer:
LATTICE
Quantity:
142
Part Number:
lc5256mv-5FN256C
Manufacturer:
LATTICE
Quantity:
778
Part Number:
lc5256mv-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
lc5256mv-75F256
Manufacturer:
LATTICE
Quantity:
15
Part Number:
lc5256mv-75F256
Manufacturer:
LATTICE
Quantity:
20 000
Part Number:
lc5256mv-75F256C
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
sysCLOCK PLL Timing
t
t
t
t
f
f
f
f
f
f
t
t
T
t
t
t
t
t
t
t
t
Y
1. This condition assures that the output phase jitter will remain within specification.
2. Accumulated jitter measured over 10,000 waveform samples.
3. Internal timing for reference only.
PLL_SEC_DELA
PWH
PWL
R
INSTB
MDIVIN
MDIVOUT
NDIVIN
NDIVOUT
VDIVIN
VDIVOUT
OUTDUTY
JIT(CC)
CLK_OUT_DLY
PHASE
LOCK
PLL_DELAY
RANGE
PLL_RSTW
CLK_IN
JIT(PERIOD)
, t
Symbol
F
3
2
Input clock, high time
Input clock, low time
Input Clock, rise and fall time
Input clock stability, cycle to cycle (peak)
M Divider input, frequency range
M Divider output, frequency range
N Divider input, frequency range
N Divider output, frequency range
V Divider input, frequency range
V Divider output, frequency range
Output clock, duty cycle
Output clock, cycle to cycle jitter (peak)
Output clock, period jitter (peak)
Input clock to CLK_OUT delay
Input clock to external feedback delta
Time to acquire phase lock after input stable
Delay increment (Lead/Lag)
Total output delay range (lead/lag)
Minimum reset pulse width
Global clock input delay
Secondary PLL output delay (t
Parameter
Over Recommended Operating Conditions
PLL_DELAY
)
43
80% to 80%
20% to 20%
20% to 80%
Clean reference.
10 MHz < f
100MHz < f
Clean reference.
20 MHz < f
160MHz < f
Clean reference.
10 MHz < f
100MHz < f
Clean reference.
20 MHz < f
160MHz < f
Internal feedback
Typical = +/- 250ps
External feedback
MDIVOUT
MDIVOUT
MDIVOUT
MDIVOUT
VDIVIN
VDIVIN
VDIVIN
VDIVIN
Conditions
ispXPLD 5000MX Family Data Sheet
< 160 MHz
< 320 MHz
< 160 MHz
< 320 MHz
< 20 MHz or
< 320 MHz and
< 20 MHz or
< 320 MHz and
1
1
1
1
+/- 0.84 +/- 3.85
+/- 120 +/- 550
Min
100
1.2
1.2
10
10
10
10
10
40
+/- 250
+/- 250
+/- 150
+/- 300
+/- 150
Max
320
320
320
320
400
320
600
3.0
3.0
1.8
1.0
1.5
60
25
Units
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ps
ps
ps
ps
ps
ns
ps
us
ps
ns
ns
ns
ns
%

Related parts for lc5256mv