ak4552 AKM Semiconductor, Inc., ak4552 Datasheet - Page 11

• Manufacturer Part Number: ak4552
• Description: 3v 96khz 24bit ?? Codec
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The ADC and DAC of AK4552 are placed in the power-down mode by bringing power down pin, PDN = “L” and each
digital filter is also reset at the same time. These resets should always be done after power-up. In case of the ADC, an anlog
initialization cycle starts after exiting the power-down mode. Therefore, the output data, SDTO becomes available after
2081 cycles of LRCK clock. This initialization cycle does not affect the DAC operation. Figure 6 shows the power-up
sequence.
MS0055-E-01
Power-down & Reset
Clock In
MCLK,LRCK,BCLK
DAC Internal
DAC In
DAC Out
ADC Internal
ADC In
ADC Out
External
PDN
(Digital)
(Analog)
(Analog)
(Digital)
Mute
(1) Click noise occurs at the “
State
State
system application.
Normal Operation
Normal Operation
Idle Noise
GD
” of PDN signal. Please mute the analog output external if the click noise influences
GD
(1)
Figure 6. Power-up Sequence
Power-down
Mute ON
Power-down
The clocks may be stopped.
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(1)
“0”data
“0”data
Normal Operation
Init Cycle
2081/fs
GD
Idle Noise
Normal Operation
GD
[AK4552]
2001/02