ak4589 AKM Semiconductor, Inc., ak4589 Datasheet - Page 38

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ak4589

Manufacturer Part Number
ak4589
Description
2/8-channel Audio Codec With Dir
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
All DACs of The AK4589 can be powered-down individually by PD1-4 bits. The analog part of DAC is in power-down
by PD1-4 bits =”1”, however, the digital part is not in power-down by it. Even if all DACs were set in power-down by
the partial power-down bits, the digital part continue to function. The analog output of the channel which is set in
power-down by PD1-4 bits is fixed to the voltage of VCOM. And though DZF detection is being done, the result of
DZF detection stops reflecting to DZF1-2 pins. Because some click noise occurs in both set-up and release of
power-down, either the analog output should be muted externally or PD1-4 bits should be set up when it is in PWDAN
bit =”0” or RSTN bit =”0”, if the click noise influences system application. Figure 16 shows the sequence of the
power-down and the power-up by PD1-4 bits.
Notes:
MS0339-E-00
DAC partial Power-Down Function
(1) Digital output corresponding to analog input and analog output corresponding to digital input have the group
(2) Analog output of the DAC powered down by PD1-4 bits =”1” is fixed to the voltage of VCOM.
(4) Though DZF detection is being done at a certain channel which set up PD1-4 bits =”1”, the result of DZF
(5) DZF detection of the DAC which is set up by the power-down setting is ignored, and DZF1-2 pins become ”H”.
(6) When the power-down function is set up and the channel has input signal, even if the partial power-down
(3) Immediately after PD1-4 bits are changed, some click noise occurs at the output of the channel changed by the
own PD bits.
delay (GD).
detection stops reflecting to DZF1-2 pins.
function is set up, DZF1-2 bits do not become ”H”.
DAC Analog
Internal State
DAC In
DAC Out
Normal Operation Channel
DAC In
DAC Out
Clock In
MCLK,LRCK1,
BICK1
DZF1/DZF2
DAC Digital
Internal State
DZF Detect
Internal State
DZF Detect
Internal State
Power Down Channel
PD1-4 bit
(Digital)
(Analog)
(Digital)
(Analog)
Normal Operation
8192/fs
GD
Figure 16. DAC partial power-down example
“0”data
8192/fs
GD
(5)
(1)
Power-down
(3)
(2)
(4)
(3)
- 38 -
“0”data
Normal Operation
Normal Operation
GD
(3)
Power-down
(6)
(4)
(2)
(3)
Normal Operation
Normal Operation
GD
[AK4589]
2004/09

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