ak4640 ETC-unknow, ak4640 Datasheet - Page 38

• Manufacturer Part Number: ak4640
• Description: 16bit Codec With /hp/spk-ampl
• Manufacturer: ETC-unknow

ASAHI KASEI
The output signal from analog volume is converted into a mono signal [(L+R)/2] and this signal is input to the
Speaker-amp via the ALC2 circuit. This Speaker-amp is a mono output controlled by BTL and can output a maximum of
300mW@ALC2=OFF and 250mW@ALC2=ON at 8Ω load when HVDD = 3.3V.
Speaker blocks (MOUT2, ALC2 and Speaker-amp) can be powered up/down by controlling the PMSPK bit. When the
PMSPK bit is “0”, the MOUT2, SPP and SPN pins are placed in a Hi-Z state.
When the SPPS bit is “0”, the Speaker-amp enters power-save-mode. In this mode, the SPP pin is placed in a Hi-Z state
and the SPN pin goes to HVDD/2 voltage. And then the Speaker output gradually changes to the HVDD/2 voltage and
this mode can reduce click noise at power-up. When the AK4640 is powered down, click noise can be also reduced by
first entering power-save-mode.
The mixed Lch/Rch signal of DAC is output from the MOUT2 pin. When the MOUT2 bit is “0”, this output is OFF and
the MOUT2 pin is forced to VCOM voltage. The load impedance is 10kΩ (min.). When the PMSPK bit is “0”, the
Speaker-amp enters power-down-mode and the output is placed in a Hi-Z state.
MS0273-E-00
Speaker Output
Mono Output (MOUT2 pin)
PMSPK bit
SPPS bit
SPP pin
SPN pin
Hi-Z
Figure 27. Power-up/Power-down Timing for Speaker-amp
HVDD/2
Hi-Z
>1ms
Table 22. SPK-Amp Maximum Output Power
ALC2
0
1
Po(max)
300mW
250mW
- 38 -
Default
HVDD/2
>0
Hi-Z
Hi-Z
[AK4640]
2004/03