ak7712a-vt AKM Semiconductor, Inc., ak7712a-vt Datasheet - Page 51

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ak7712a-vt

Manufacturer Part Number
ak7712a-vt
Description
Built-in 20-bit Adc/dac Sophisticated Audio Dsp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
ASAHI KASEI
T T T T Serial Data Interface
The clocks which are needed are XTI, LRCK(fs) and BCLK( 32fs,48fs,64fs) at slave mode, and only XTI at master
mode. About the set-up for each format, please refer the section of control register. At master mode,the clock
needed is only XTI. Once input the XTI then LRCK(fs) and BCLK(64fs) are output. The input data is synchronized
with " " of BCLK. The output data is synchronized with " "of BCLK..
0180-E-02
1.SDIN1, SDOUT1
1) Master Mode (64fs)
SDIN1 ( Input )
Control Register setting
SDOUT1 ( Output )
Control Register setting
16bit MSB justified
24bit MSB justified
16bit LSB justified
24bit LSB justified
16bit MSB justified
24bit MSB justified
16bit LSB justified
C17, C16
C17, C16
0 , 0
0 , 0
0 , 0
0 , 0
0 , 0
0 , 0
0 , 0
Fig.8 SDOUT1 Master Mode Output Format
Fig.7 SDIN1 Master Mode Input Format
C15, C14
C13, C12
0 , 0
0 , 1
1 , 0
1 , 1
0 , 0
0 , 1
1 , 0
- 51 -
[AK7712A-VT]
1997/12

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