ak4113 AKM Semiconductor, Inc., ak4113 Datasheet - Page 25

• Manufacturer Part Number: ak4113
• Description: 192khz 24bit Dir With 6 1 Selector
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The following nine events cause the INT0 and INT1 pins to show the status of the interrupt condition. When the PLL is
OFF (Clock Operation Mode 1), INT0 and INT1 pins go to “L”.
MS0349-E-02
1. UNLCK
2. PAR
3. AUTO
4. V
5. AUDION
6. STC
7. QINT
8. CINT
9. DAT
Error Handing
: PLL unlock state detect
: Parity error or bi-phase coding error detection
: Non-Linear PCM or DTS-CD Bit Stream detection
: Validity flag detection
: Non-audio detection
: Sampling frequency or pre-emphasis information change detection
: U-bit Sync flag
: Channel status sync flag
: DAT Start ID detect
not correct or when those preambles are not correct.
“1” when the PLL loses lock. The AK4113 loses lock when the distance between two preamble is
“1” when parity error or bi-phase coding error is detected, updated every sub-frame cycle.
The OR function of NPCM and DTSCD bits is available at the AUTO bit.
“1” when validity flag is detected. Updated every sub-frame cycle.
“1” when the “AUDION” bit in recovered channel status indicates “1”. Updated every block cycle.
When either FS3-0 bit or PEM bit is changed, it maintains “1” during 1 sub-frame.
“1” when the Q-subcode differs from the old one. Updated every sync code cycle for Q-subcode.
“1” when received C bit differs from the old one. Updated every block cycle.
“1” when the category code indicates “DAT” and “DAT Start ID” is detected. When DCNT bit is
“1”, it does not indicate “1” even if “DAT Start ID” is detected again within “3841 x LRCK”.
When “DAT Start ID” is detected again after “3840 x LRCK” passed, it indicates “1”. When
DCNT bit is “0”, it indicates “1” every “DAT Start ID” detection.
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[AK4113]
2005/08