ak4125 AKM Semiconductor, Inc., ak4125 Datasheet - Page 14

• Manufacturer Part Number: ak4125
• Description: 192khz / 24bit High Performance Asynchronous Src
• Manufacturer: AKM Semiconductor, Inc.

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The output port works in master mode or slave mode. The MCLK is not needed in slave mode. The CMODE2-0 pins
select the master/slave and bypass mode. The CMODE2-0 pins should be controlled when the PDN pin = “L”.
The ODIF1-0 pins and OBIT1-0 pins select the audio interface format for the output port. The audio data is MSB first, 2’s
compliment format. The SDTO is clocked out on the falling edge of OBICK. Select the audio interface format when the
PDN pin = “L”. When in BYPASS mode, both IBICK and OBICK are fixed to 64fs.
MS0379-E-04
Mode
System Clock & Audio Interface Format for Output PORT
0
1
2
3
4
5
6
7
Mode
0
1
2
3
4
5
6
7
Master / Slave
CMODE2-0 =
CMODE2-0 =
ILRCK
IBICK(64fs)
SDTI(i)
“HLL”
Master
Except
“HLL”
Slave
CMODE
H
H
H
H
L
L
L
L
2
0 1 2
OBIT1
23:MSB, 0:LSB
CMODE
Don't Care
H
H
H
H
L
L
L
L
Table 4. Output Audio Interface Format 1 (Output PORT)
Table 5. Output Audio Interface Format 2 (Output PORT)
H
H
H
H
L
L
L
L
1
Mode
Table 3. Master/Slave Control (Output PORT)
0
1
2
3
OBIT0
CMODE0
H
H
H
H
L
L
L
L
8 9
23
Lch Data
H
H
H
H
L
L
L
L
ODIF1
Figure 5. Mode 4 Timing
H
H
L
L
SDTO
16bit
18bit
20bit
24bit
16bit
18bit
20bit
24bit
8
24
Master (Bypass)
Master / Slave
ODIF0
- 14 -
H
H
L
L
Master
Master
Master
Master
Master
Master
Slave
OLRCK
Output
1
Input
31 0 1 2
0
I S Compatible
SDTO Format
MSB justified
2
LSB justified
Don't Care
(Reserved)
OBICK
Not used. Set to DVSS.
Not used. Set to DVSS.
Output
Input
OMCLK
8 9
256fso
384fso
512fso
768fso
128fso
192fso
23
Rch Data
MSB justified, I S
≥ 32fso
≥ 36fso
≥ 40fso
≥ 48fso
8
OBICK Frequency
24
64fso
8k ∼ 108kHz
8k ∼ 108kHz
8k ∼ 216kHz
8k ∼ 216kHz
8k ∼ 216kHz
8k ∼ 216kHz
2
1 0
8k ∼ 54kHz
8k ∼ 54kHz
31
0
fso
LSB justified
1
64fso
[AK4125]
2007/07