ak4125 AKM Semiconductor, Inc., ak4125 Datasheet - Page 18

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ak4125

Manufacturer Part Number
ak4125
Description
192khz / 24bit High Performance Asynchronous Src
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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The AK4125 is reset automatically when the output clock is stopped. If the output clock is started again, normal data is
output within 100ms.
The change of the clock supplied to AK4125 is shown in Figure 13
The UNLOCK pin outputs “L” when the internal PLL is locked. When the internal PLL is unlocked, the UNLOCK pin
outputs “H” and the SDTO = “0”. When the PDN pin = “L”, the UNLOCK pin outputs “H”.
MS0379-E-04
Internal Reset Function for Clock Change
Note 1. The data on SDTO may cause a clicking noise. To prevent this, set “0” to the SDTI from GD before the PDN
Note 2. SMUTE can also remove the unknown data.
UNLOCK pin
Sequence of Changing Clocks
pin changes to “L”. It makes the data on SDTO remain as “0”.
External clocks
(Input port
PDN pin
(Internal state)
SDTO
SMUTE (Note2,
Att.Level
or Output port)
recommended)
-
0dB
dB
Normal operation
Normal data
Clocks 1
Figure 13. Sequence of changing clocks
1024/fso
Power-down
Don’t care
Note1
- 18 -
PLL lock &
.
fs detection
< 100ms
Clocks 2
1024/fso
Normal operation
Normal data
[AK4125]
2007/07

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