ak4145 AKM Semiconductor, Inc., ak4145 Datasheet - Page 18

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ak4145

Manufacturer Part Number
ak4145
Description
Digital Stereo Btsc Encoder
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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2. WRITE Operations
Set R/W bit = “0” for the WRITE operation of the AK4145.
After receipt the start condition and the first byte, the AK4145 generates an acknowledge, and awaits the second byte
(register address). The second byte consists of the address for control registers of the AK4145. The format is MSB first,
and those most significant 3-bits are “Don’t care”.
After receipt the second byte, the AK4145 generates an acknowledge, and awaits the third byte. Those data after the
second byte contain control data. The format is MSB first, 8bits.
The AK4145 is capable of more than one byte write operation by one sequence.
After receipt of the third byte, the AK4145 generates an acknowledge, and awaits the next data again. The master can
transmit more than one words instead of terminating the write cycle after the first data word is transferred. After the
receipt of each data, the internal 5bits address counter is incremented by one, and the next data is taken into next address
automatically. If the address exceeds TBDH prior to generating the stop condition, the address counter will “roll over” to
00H and the previous data will be overwritten.
Rev. 0.3
SDA
D7
*
S
T
A
R
T
S
Slave
Address
D6
*
Figure 12. Byte structure after the second byte
A
C
K
D5
*
Figure 13. WRITE Operation
Register
Address(n)
Figure 11. The Second Byte
A4
D4
A
C
K
- 18 -
Data(n)
A3
D3
A
C
K
Data(n+1)
A2
D2
A
C
K
A1
D1
(*: Don’t care)
Data(n+x)
A0
D0
S
T
O
P
P
[AK4145]
2007/11

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