ak4141 AKM Semiconductor, Inc., ak4141 Datasheet - Page 31

• Manufacturer Part Number: ak4141
• Description: Nicam/a2/eia-j Digital Stereo Decoder
• Manufacturer: AKM Semiconductor, Inc.

1-3. ACKNOWLEDGE
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The transmitter will release the
SDA line (HIGH) after transmitting eight bits. The receiver must pull down the SDA line during the acknowledge clock
pulse so that that it remains stable “L” during “H” period of this clock pulse. The AK4141 generates an acknowledge after
each byte is received.
In read mode, the slave, the AK4141 transmits eight bits of data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no STOP condition is generated by the master, the slave will continue
transmitting data. If an acknowledge is not detected, the slave will terminate further data transmissions and await the
STOP condition.
1-4. FIRST BYTE
The first byte, which includes seven bits of slave address and one bit of R/W bit, is sent after the START condition. If the
transmitted slave address matches an address for one of the device, the receiver who has been addressed pulls down the
SDA line.
The most significant four bits of the slave address are fixed as “1000”. The next three bits are CAD1, CAD0 (device
address bits) and “0”. These three bits identify the specific device on the bus. The setting such as CAD/CAD0 = “11” is
not available. The eighth bit (LSB) of the first byte (R/W bit) defines whether the master requests a write or read
condition. A “1” indicates that the read operation is to be executed. A “0” indicates that the write operation is to be
executed.
MS0952-E-00
SCL FROM
MASTER
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
CONDITION
START
CAD1 pin
1
H
H
H
H
L
L
L
L
0
CAD0 pin
Figure 20. Acknowledge on the I
H
H
H
H
L
L
L
L
1
Table 19. The First Byte Setting
(CAD1-CAD0 bits should match with CAD1-CAD0 pins)
0
Figure 21. The First Byte
Write
Write
Write
Write
Read
Read
Read
Read
R/W
0
- 31 -
CAD1
CAD0
2
C-bus
First Byte
80H
81H
84H
85H
88H
89H
N/A
N/A
(N/A: Not available)
8
0
R/W
not acknowledge
acknowledge
Clock pulse
for acknowledge
9
[AK4141]
2008/05