ak4140 AKM Semiconductor, Inc., ak4140 Datasheet - Page 13

• Manufacturer Part Number: ak4140
• Description: Digital Btsc Decoder
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK4140 should be reset once by bringing PDN PIN = “L” upon power-up.
The external clocks required to operate the AK4140 are MCLK, LRCK and SCLK. The AK4140 supports 256fs, 384fs,
512fs and 768fs as master clock (MCLK). The CKS1/0 bits select MCLK frequency. The AK4140 should be reset by
PDN pin= “L” after threse clocks are provided. If the external clocks are not present, place the AK4140 in power-down
mode. After exiting reset at power-up etc., the AK4140 remains in power-down mode until MCLK and LRCK are input.
The AK4140 supports 16 types of audio data interface selected by the TDM1-0, DIF bits and M/S pin as shown in Table
3. In all formats the serial data is MSB-first, 2's compliment format. The SDTO is clocked out on the falling edge of
SCLK.
In normal mode, Mode 0-1 are the slave mode, and SCLK is available up to 128fs. SCLK outputs 64fs clock in Mode 2-3.
In TDM256 mode, SCLK should be fixed to 256fs. In the slave mode, “H” time and “L” time of LRCK should be 1/256fs
at least. In the master mode, “H” time (“L” time at I
In TDM128A mode, SCLK should be fixed to 128fs. In the slave mode, “H” time and “L” time of LRCK should be
1/128fs at least. In the master mode, “H” time (“L” time at I
In TDM128B mode, SCLK should be fixed to 128fs. In the slave mode, “H” time and “L” time of LRCK should be
1/128fs at least. In the master mode, “H” time (“L” time at I
MS0547-E-01
System reset and Power-down Mode
System Clock
Audio Interface Format
PDN pin: Power down pin
32.0kHz
44.1kHz
48.0kHz
fs
“H”: Normal operation
“L”: Device power down & reset.
11.2896MHz
12.2880MHz
8.1920MHz
256fs
CKS1
bit
12.2880MHz
16.9344MHz
18.4320MHz
0
0
1
1
Table 1. System clock example (Slave mode)
384fs
Table 2. Master clock frequency select
OPERATION OVERVIEW
CKS0
MCLK
bit
0
1
0
1
2
16.3840MHz
22.5792MHz
24.5760MHz
S mode) of LRCK is 1/8fs typically.
512fs
- 13 -
2
2
S mode) of LRCK is 1/4fs typically.
S mode) of LRCK is 1/8fs typically.
MCLK
256fs
384fs
512fs
768fs
33.8688MHz
36.8640MHz
24.576MHz
768fs
(default)
2.0480MHz
2.8224MHz
3.0720MHz
64fs
SCLK
4.0960MHz
5.6448MHz
6.1440MHz
128fs
[AK4140]
2007/03