ml7074-003 Oki Semiconductor, ml7074-003 Datasheet - Page 34

• Manufacturer Part Number: ml7074-003
• Description: Dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free Msm7731-02dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free
• Manufacturer: Oki Semiconductor

(6) CR5 (Acoustic echo canceler setting)
B7
B6
B5
B4
B3
B2
OKI Semiconductor
Initial Value
CR5
NCPAD2
“Through mode”control
Reserved bit.
Coefficient update control
Howling detector control
Center clip control
NCPAD control
This is the “Through mode” control bit for the acoustic echo canceler. In the “through mode”, RinA and
SinA data is output directly to RoutA and SoutA respectively while each echo coefficient is maintained.
In the through mode, the functions of AHD, AHLD, AATT and AGC are invalid. Because this bit is
read in synchronization with the rising edge of the SYNC signal, hold the data in the bit for 250 µs or
longer.
This bit is internally ORed with the ATHR pin.
This bit selects whether the adaptive FIR filter (AFR) coefficients for the acoustic echo canceler will be
updated. This function is valid when the ATHR pin is in the normal mode.
Because this bit is read in synchronization with the rising edge of the SYNC signal, hold the data in the
bit for 250 µs or longer.
This bit controls the function to detect and cancel the howling that occurs in an acoustic system such as
a handsfree communication system. This function is valid when the ATHR pin is in the normal mode.
Because this bit is read in synchronization with the rising edge of the SYNC signal, hold the data in the
bit for 250 µs or longer.
This bit is internally ORed with the AHD pin.
When the SoutA output of the acoustic echo canceler is –57 dBm0 or less, the center clip function
forcibly sets it to the minimum positive value. This function is valid when the ATHR pin is in the
normal mode.
Because this bit is read in synchronization with the rising edge of the SYNC signal, hold the data in the
bit for 250 µs or longer.
This bit adjusts the noise canceler I/O gain. The gain adjustment is valid for tone control after canceling
the noise. The bigger the input level of the noise canceler is, the better the sound quality is. Because this
bit is read in synchronization with the rising edge of the SYNC signal, hold the data in the bit for 250 µs
or longer. This bit is internally ORed with the NCPAD2 pin. (Refer to the NCPAD1 pin of CR4-B2.)
0
0
1
1
ATHR
B7
0
B6
—
0
NCPAD1
1: “through mode” 0: normal mode (echo canceler operation)
Modification of initial values is inhibited.
1: fixed coefficients0: updated coefficients
1: OFF
1: ON
AHLD
0
1
0
1
B5
0
AHD
B4
0
0: ON
0: OFF
GPADNC (dB)
ACLP
B3
0
12
18
0
6
NCPAD2
B2
0
AATT
LPADNC (dB)
B1
0
FEDL7731-02-11
–12
–18
–6
0
MSM7731-02
AGC
B0
0
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