ml7074-001ga Oki Semiconductor, ml7074-001ga Datasheet
ml7074-001ga
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ml7074-001ga Summary of contents
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... Oki Semiconductor Document Reference: FEDL7074-001-01 ML7074-001GA ...
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... D0 to D15 ...................................................................................................................................................................19 CSB ............................................................................................................................................................................19 RDB ............................................................................................................................................................................19 WRB ...........................................................................................................................................................................19 FR0B (DMARQ0B).....................................................................................................................................................19 FR1B (DMARQ1B).....................................................................................................................................................19 ACK0B........................................................................................................................................................................20 ACK1B........................................................................................................................................................................20 GPI0, GPI1 .................................................................................................................................................................20 GPO0, GPO1 .............................................................................................................................................................20 CLKSEL......................................................................................................................................................................20 SYNC..........................................................................................................................................................................20 BCLK ..........................................................................................................................................................................20 PCMO .........................................................................................................................................................................21 PCMI...........................................................................................................................................................................21 SELECTABLE VOIP ENVIRONMENT CONFIGURATION EXAMPLES......................................................................23 Analog I/F Mode.........................................................................................................................................................23 PCM I/F Mode ............................................................................................................................................................24 Mutual Conversion of G.729.A to G.726 and Vice-Versa .........................................................................................25 APPLICATION CIRCUIT EXAMPLE..............................................................................................................................26 PACKAGE DIMENSIONS ..............................................................................................................................................27 ML7074-001GA ...
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... Oki Semiconductor ML7074-001GA ...
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... G.711 (64 kbps) µ-law, and A-law, and a mutual conversion function between G.729.A and G.726. The ML7074-001GA is optimized for adding VoIP functions to terminal adapters, routers, and IP-phones with a rich feature set that includes an echo canceller for 32 msec delay, DTMF detection, two tone detection functions, and tone generation, built-in FIFOs, I/P and O/P amplifiers ...
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... Oki Semiconductor BLOCK DIAGRAM ML7074-001GA 2 ...
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... Oki Semiconductor PIN ASSIGNMENT (TOP VIEW) 64-pin plastic QFP ML7074-001GA 3 ...
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... Data input/output I Fix to input state when using in 8-bit bus access (CR11-B5 = “1”). Data input/output I Fix to input state when using in 8-bit bus access (CR11-B5 = “1”). Data input/output I Fix to input state when using in 8-bit bus access (CR11-B5 = “1”). ML7074-001GA Description 4 ...
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... AMP2 Output (10 kΩ driving) AMP3 Output (10 kΩ driving) Analog ground (0.0 V) Digital ground (0.0 V) 4.096 MHz crystal oscillator I/F, 4.096 MHz clock input 4.096 MHz crystal oscillator I/F Digital power supply Test control input 3: Normally input “0”. Test control input 2: Normally input “0”. ML7074-001GA 5 ...
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... AGND Fmck MCK Fbclk BCLK (at input) Fsync SYNC (at input) DRCLK MCK, BCLK (at input) BCLK to SYNC tBS (at input) SYNC to BCLK tSB (at input) tWS SYNC (at input) ML7074-001GA Rating Unit −0.3 to 5.0 V −0.3 to 5.0 V −0 0 −0 0 −0.3 to 6.0 V −55 to +150 ° ...
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... IOL = −1.0 mA (XO pin) Input pins = 3 3.0 to 3.6 V, AGND = DGND0 0 Conditions RIN AIN0N, AIN0P, AIN1N RL GSX0, GSX1, VFRO0, VFRO1 CL Analog output pins VOF VFRO0, VFRO1 GSX0, GSX1, VFRO0, VFRO1 kΩ ML7074-001GA Min. Typ. Max. Unit 5.0 20.0 mA 45.0 55.0 mA 50.0 65.0 mA ...
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... Analog input = AVREF PCMI = ”1” 1020 0 1020 0 Noise frequency range kHz Noise level: 50mVpp ML7074-001GA Min. Typ. Max. Unit −0.15 0.20 dB Reference value 0.80 dB −0.15 ...
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... V, AGND = DGND0 0 Conditions In the analog I/F mode In the PCM I/F (16-bit linear) mode In the PCM I/F (G.711) mode Echo Canceller Sin Sout Level Meter LPF Rout Rin 5 kHz ML7074-001GA Min. Typ. Max. Unit −1.0 1.0 dB Min. Typ. Max. Unit −1.5 1 ...
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... AVREF CR5-B7 (READY 3.0 to 3.6 V, AGND = DGND0 0 Conditions PDNB pin AVREF = 1.4 (90 4.7 mF 0.1 mF (See figure 9.) t AVREF t INIT Figure 1 PDNB, XO, and AVREF timings ML7074-001GA Min. Typ. Max. 1 2+a [1] 100 600 1 Initialization mode ...
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... PCMO pin tXD1 Pull-up, pull-down resistors tXD2 RDL = 1 kΩ, CDL = 50 pF tXD3 LSB G.726 LSB G.726 ML7074-001GA Min. Typ. Max. 64 +0.1% −0. +0.1% −0.1% 12.4 12.5 12.6 6.24 6.25 6.26 100 ...
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... SYNC tXD1 Hi-z MSB PCMO Figure 5 PCM I/F mode output timing (short frame tXD2 LSB G.726 tXD2 LSB G.726 ML7074-001GA tXD3 tXD3 LSB LSB 16-bit G.711 linear tXD3 LSB LSB 16-bit G.711 linear 18 ...
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... tWW tRDD tRDH tRW tCD A1 tAS tAH D1 Input tWDS tWDH tCS tCH tCD tWW Write timing Figure 6 Control register interface ML7074-001GA Min. Typ. Max. 10 10 10 10 10 10 ...
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... A1 tAS tAS tAH tAH D1 D1 Input Input tWDS tWDS tWDH tWDH tCS tCS tCH tCH tCD tCD tWW tWW Write timing Write timing ML7074-001GA Min. Typ. Max. 3 20 10 10 10 10 ...
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... tWW tDR0S tDR0FD tRDD tRDH tRW tAD tDR0S tDR1S tDR1FD tDR1RD A1 tAS tAH D1 Input tWDS tWDH tAKS tAKH tAD tWW Write timing ML7074-001GA Min. Typ. Max. Unit 3 25 25 10 10 10 ...
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... R2 : Max 500k GSX0 R2 10kΩ AIN0N AIN0P AMP0 GSX1 R4 10κΩ AIN1N AMP1 10kΩ C3 VFRO0 Out : Max 1.3Vp-p AMP2 10kΩ C4 VFRO1 Out : Max 1.3Vp-p AMP3 AVREF C5 + 2.2 to 4.7µF C6 0.1µF Figure 9 Analog interface ML7074-001GA CR10-B0 A/D CR10-B1 D/A CR10-B2 VREF 16 ...
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... See figure 12 circuit diagram. CR0-B7 To internal (SPDN) circuits PDNB are the power supply pins for the digital circuits while AV DD ML7074-001GA To internal circuits XO Open 4.096 MHz X’tal(4.096 MHz Daishinku Co., Ltd. 5pF 10pF 1MΩ ...
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... An interrupt is generated when there is a change from the condition in which the FSK generator is requesting for transmission data to the condition in which there is no request for internal fetch of the data to be transmitted next. • When DSP_ERR is detected (CR3-B7). An interrupt is generated when any error occurs in the DSP inside the ML7074. ML7074-001GA 18 ...
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... This output becomes “L” when the receive buffer becomes empty, and returns to the “H” level automatically on the falling edge of the write enable signal (WRB = “1” → “0”) when there is an acknowledgement signal (ACK1B = “0”) from the ML7074. This relationship is repeated until a specific number of words are written from the ML7074. ML7074-001GA 19 ...
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... Input 2048 kHz clock when G.711 or G.726 is selected. Input a 128 to 2048 kHz clock when 16-bit linear mode is selected. An “L” level is output during the power-down mode kHz clock is output when G.711 or G.726 is selected. A 128 kHz clock is output when G.729.A or 16-bit linear mode is selected. ML7074-001GA 20 ...
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... This is the PCM signal input pin for the receiving section. The data is entered starting from the MSB by shift on the falling edge of BCLK. The basic timing chart of the PCM I/F mode is shown in figure 11. Fix input with “0” or “1” when the mutual conversion function is not used (CR11-B0 = “0”) or when the PCM I/F mode (CR12-B0 = “0”) is not used. ML7074-001GA 21 ...
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... Oki Semiconductor Figure 11 PCM I/F mode timing diagram ML7074-001GA 22 ...
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... LPAD GPAD Center Clip - ATTs TONE_GEN (TONEA/B) AFF Rout ATTr Rin RXGAIN FSK_GEN MCK PLL CKGN SYNC(8kHz) OSC Power ML7074-001GA TONE_DET0 TONE0_DET TONE_DET1 TONE1_DET DTMF_DET DTMF_REC DTMF_CODE[3:0] Speech Codec Bus Control Unit Encoder TX G.729.A Buffer0 G.726 TX G.711 Buffer1 G.729.A Decoder RX G.729.A Buffer0 G ...
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... LPAD Center GPAD Clip - ATTs TONE_GEN (TONEA/B) AFF Rout ATTr Rin RXGAIN FSK_GEN MCK PLL CKGN SYNC(8kHz) OSC Power ML7074-001GA TONE_DET0 TONE0_DET TONE_DET1 TONE1_DET DTMF_DET DTMF_REC DTMF_CODE[3:0] Speech Codec Bus Control Unit Encoder TX G.729.A Buffer0 G.726 TX G.711 Buffer1 G.729.A Decoder RX G.729.A Buffer0 G ...
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... LPAD Center GPAD Clip - ATTs TONE_GEN (TONEA/B) AFF Rout ATTr Rin RXGAIN FSK_GEN MCK PLL CKGN SYNC(8kHz) OSC Power ML7074-001GA TONE_DET0 TONE0_DET TONE_DET1 TONE1_DET DTMF_DET DTMF_REC DTMF_CODE[3:0] Speech Codec Bus Control Unit Encoder TX G.729.A Buffer0 G.726 TX G.711 Buffer1 G.729.A Decoder RX G.729.A Buffer0 G ...
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... FR0B 42 FR1B PDNB INTB 60 CSB XI 61 RDB XO WRB +3.3V 7 DVDD0 33 DVDD1 62 DVDD2 49 AVDD 16 TST3 DGND0 44 TST2 DGND1 59 TST1 DGND2 58 TST0 AGND Figure 12 Application Circuit Example ML7074-001GA MCU 23 I +3. ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ML7074-001GA (Unit: mm) Package material Epoxy resin Lead frame material ...
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... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. ML7074-001GA Copyright 2002 Oki Electric Industry Co., Ltd. 28 ...
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... Oki Semiconductor reserves the right to make changes in specifications at anytime and without notice. This information furnished by Oki Semiconductor in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Oki Semiconductor for its use; nor for any infringements of patents or other rights of third parties resulting from its use. No license is granted under any patents or patent rights ...
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R S EGIONAL Semiconductor Products Northwest Area 785 N. Mary Avenue Sunnyvale, CA 94085 Tel: 408/720-8940 Fax: 408/720-8965 Northeast Area Shattuck Office Center 138 River Road Andover, MA 01810 Tel: 978/688-8687 617/489-3092 Fax: 978/688-8896 North Central Area 300 Park Blvd., ...