msm7581 Oki Semiconductor, msm7581 Datasheet - Page 15

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msm7581

Manufacturer Part Number
msm7581
Description
Itu-t G.721 4ch Adpcm Transcoder
Manufacturer
Oki Semiconductor
Datasheet

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NOTES ON USAGE
(1) Through Mode (CODER Side)
(2) Through Mode (DECODER Side)
¡ Semiconductor
Through-Data Output (SOA)
Through-Data Output (SOA)
Through-Data Output (SOP)
Through-Data Output (SOP)
ADPCM side SYNC (SYRA)
ADPCM side SYNC (SYXA)
ADPCM side SYNC (SYXA)
PCM side SYNC (SYRP)
PCM side SYNC (SYRP)
PCM side SYNC (SYXP)
Internal Latch Timing
Internal Latch Timing
ADPCM Input (SIA)
PCM Input (SIP)
BCLK
BCLK
(A) When SYXA rises after t1, PCMDATA1 is output to ADPCMDATA1.
(B) When SYXA rises before t1, PCMDATA1 is output to ADPCMDATA1.
If SYXA rises near the t1 and jitter occurs, data slip may occur. Therefore SYXA should not rise in the range of ±500ns from t1.
The data slip means that data is deleted or the same data is output twice.
(A) When SYRP rises after t1, ADPCMDATA1 is output to PCMDATA1.
(B) When SYRP rises before t1, ADPCMDATA1 is output to PCMDATA1.
If SYRP rises near the t1 and jitter occurs, data slip may occur. Therefore SYRP should not rise in the range of ±500ns from t1.
The data slip means that data is deleted or the same data is output twice.
(A)
(B)
(A)
(B)
1
1
t0
t0
2
2
3
3
ADPCMDATA1
PCMDATA1
ADPCMDATA0
PCMDATA0
4
4
5
5
6
6
7
7
8
8
t1
t1
*t1 is the falling edge of the 8th BCLK counted from t0.
*t1 is the falling edge of the 8th BCLK counted from t0.
ADPCMDATA0
PCMDATA0
ADPCMDATA2
PCMDATA2
ADPCMDATA1
PCMDATA1
ADPCMDATA1
PCMDATA1
ADPCMDATA3
PCMDATA3
ADPCMDATA2
PCMDATA2
MSM7581
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