msm7718-01 Oki Semiconductor, msm7718-01 Datasheet - Page 7

• Manufacturer Part Number: msm7718-01
• Description: Echo Canceler With Adpcm Codec
• Manufacturer: Oki Semiconductor

BCLKP
SYNCP
PCM
Multiple
¡ Semiconductor
PCMLNI
PCM transmit data input of the line echo canceler.
PCM is shifted in at a falling edge of the BCLKP signal and input from MSB. The start of the PCM
data (MSB) is identified at the rising edge of SYNCP. However, this signal timing can be controlled
at PCM mutiplexing by the control register CR2-B3 to B5.
(One of the time slots 1 to 7 can be selected. Refer to Figs. 2-4.)
PCMACO
PCM transmit data output of the line echo canceler.
PCM is output from MSB in a sequential order, synchronizing with the rising edge of BCLKP and
SYNCP. However, this signal timing can be controlled at PCM multiplexing by the control
register CR2-B0 to B2. (The time slot 1 to 7 can be selected. Refer to Figs. 2 - 4.)
This pin is in a high impedance state except during 8-bit PCM output.
(It is also in a high impedance sate during power down mode.) A pull-up resistor must be connected
to this pin because its output is configured as an open drain.
PCMACI
PCM receive data input of the line echo canceler.
PCM is shifted in at a falling edge of BCLKP and input from MSB.
The start of the PCM data (MSB) is identified at the rising edge of SYNCP. However, this signal
timing can be controlled at PCM multiplexing by the control register CR2-B0 to B2. (One of the time
slots 1 to 7 can be selected. Refer to Figs. 2-4.)
Note : The PCM signals (PCMPCI and PCMPCO) of the PCM CODEC are always assigned to time
slot 1.
The PCM signals (PCMADI and PCMADO) of the ADPCM transcoder can be assigned to
time slot 1 or 2.
The PCM signals (PCMLNI, PCMLNO, PCMACI, PCMACO) of the line echo canceler can
be assigned to one of the time slots 1 to 7. (Multiple timing is controlled by CR1 and CR2.)
time slot 1
Figure 2 PCM Multiple Timing
time slot 2
time slot 3
time slot 7
MSM7718-01
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