msm7728 Oki Semiconductor, msm7728 Datasheet - Page 6

• Manufacturer Part Number: msm7728
• Description: Single Rail Linear Codec
• Manufacturer: Oki Semiconductor

¡ Semiconductor
PCMIN
PCM signal input.
A serial PCM signal input to this pin is converted to an analog signal synchronously with the
SYNC signal and BCLK signal.
The data signaling rate of the PCM signal is equal to the frequency of the BCLK signal.
The PCM signal is shifted at the falling edge of the BCLK signal. The PCM signal is latched into
an internal register when shifted by 14 bits.
The top of the data (MSD) is identified at the rising edge of SYNC.
The input signal should be input in the 14-bit 2's complement format.
The MSD bit represents the polarity of the signal with respect to the signal ground.
PCMOUT
PCM signal output.
The PCM output signal is output starting with MSD in sequential order, synchronously with the
rising edge of the BCLK signal.
MSD may be output at the rising edge of the SYNC signal, depending on the timing between
BCLK and SYNC.
This pin is in a high impedance state except during 14-bit PCM output. It is also high impedance
when the CODEC is turned off.
A pull-up resistor must be connected to this pin, because its output is configured as an open
drain.
The output coding format is in 14-bit 2's complement.
The MSD represents a polarity of the signal with respect to the signal ground.
Input/Output Level
+Full scale
–Full scale
+1
–1
0
MSD
0 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
1 0 0 0
Table 1
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
0 0 0 0
PCMIN/PCMOUT
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
0 0 0 0
1 1
0 1
0 0
1 1
0 0
MSM7728
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