92hdw74c Integrated Device Technology, 92hdw74c Datasheet - Page 53

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92hdw74c

Manufacturer Part Number
92hdw74c
Description
6-channel Hd Audio Codec, Single Or Dual Spdif
Manufacturer
Integrated Device Technology
Datasheet
SIX CHANNEL HD AUDIO CODEC, PREMIUM WLP 3/4 COMPLIANT
92HDW74C1
SIX CHANNEL HD AUDIO CODEC, PREMIUM WLP 3/4 COMPLIANT
6.2.14. AFG GPIOEn
6.2.13.1. AFG GPIO
6.2.14.1. AFG GPIOEn
[3]
[2]
[1]
[0]
Get
[31.:8]
[7]
[6]
Bit
Bit
Data3
Data2
Data1
Data0
Rsvd
Mask7
Mask6
Bitfield Name
Bitfield Name
F16
Verb ID
RW
RW
RW
RW
R
RW
RW
53
RW
RW
0
0
0
0
000000
0
0
Reset
Reset
00
Data for GPIO3. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO2. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO1. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Data for GPIO0. If this GPIO bit is con-
figured as Sticky (edge-sensitive) input
it can be cleared by writing "0". For de-
tails of read back value refer to HD Au-
dio spec. section 7.3.3.22
Reserved.
Enable for GPIO7: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Enable for GPIO6: 0 = pin is disabled
(Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Payload
92HDW74C1
Description
Description
See bitfield table.
Response
PC AUDIO
V 1.0 03/08

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