mt9162as Mitel, mt9162as Datasheet - Page 5

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mt9162as

Manufacturer Part Number
mt9162as
Description
Iso2-cmos 5 Volt Single Rail Codec
Manufacturer
Mitel
Datasheet
Advance Information
For synchronous operation, data is sampled from
Din, on the falling edge of BCL during the time slot
defined by the STB input. Data is made available, on
Dout, on the rising edge of BCL during the time slot
defined by the STB input. Dout is tri-stated at all
times when STB is not true. If STB is valid, then quiet
code will be transmitted on Dout during the valid
strobe period. There is no frame delay through the
PCM serial circuit for synchronous operation.
For asynchronous operation Dout and Din are as
defined for synchronous operation except that the
allowed output jitter on Dout is larger. This is due to
the resynchronization circuitry activity and will not
affect operation since the bit cell period at 128 kb/s
and 256 kb/s is relatively large. There is a one frame
delay
asynchronous operation. Refer to the specifications
of Figures 5 & 6 for both synchronous and
asynchronous SSI timing.
PWRST
While the MT9162 is held in PWRST no device
control or functionality is possible.
+5V
through
the
100k
100k
1k
From Digital
100k
100k
100k
1k
100k
1k
100k
1k
1k
1k
xx x x x x
0.1 F
0.1 F
Phone
x
x
xx
PCM
x
x
CS0
CS1
CS2
RxMUTE
TxMUTE
Twisted Pair
serial
1 F
x
x
A/
VBias
x
x
Figure 4 - Line Card Application
circuit
(
Converter
DC to DC
Typical External Gain
10
1
2
3
4
5
6
7
8
9
for
AV= 5-10
MT9162
Applications
Figure 4 shows the MT9162 in a line card
application.
+5V
Lout
20
19
18
17
16
15
14
13
12
11
Lin
Z
T
)
+5V
MT8972
DNIC
Input from Subscriber
Line Interface
Din
Dout
Frame Pulse
Clock
Out to Subscriber Line
Interface
MT9162
7-165

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