zl30110 Zarlink Semiconductor, zl30110 Datasheet - Page 6

• Manufacturer Part Number: zl30110
• Description: Telecom Rate Conversion Dpll
• Manufacturer: Zarlink Semiconductor

2.2
Input Reference
Master Clock
Control and Status
Output Clocks
Pin #
28
10
13
19
26
25
24
23
11
9
3
2
Pin Description
REF_FAIL
OUT_SEL
C25ao
C25bo
C25do
C25co
Name
OSCo
LOCK
OSCi
C65o
REF
RST
Type
I/O
O
O
O
O
O
O
O
O
I
I
I
I
Reference (LVCMOS, Schmitt Trigger). This is the input reference source
used for synchronization. One of four possible frequencies may be used: 8 kHz,
2.048 MHz, 8.192 MHz or 16.384 MHz. This pin is internally pulled down to
GND.
Oscillator Master Clock (Input). For crystal operation, a 25 MHz crystal is
connected from this pin to OSCo. For clock oscillator operation, this pin must be
connected to a clock source.
Oscillator Master Clock (LVCMOS). For crystal operation, a 25 MHz crystal is
connected from this pin to OSCi. This output is not suitable for driving other
devices (see C25o output pin for support of such function). For clock oscillator
operation, this pin must be left unconnected.
Reset (LVCMOS, Schmitt Trigger). A logic low at this input resets the device.
On power up, the RST pin must be held low for a minimum of 300 ns after the
power supply pins have reached the minimum supply voltage. When the RST
pin goes high, the device will transition into a Reset state for 3 ms. In the
Reset state all outputs will be forced into high impedance.
Output Select (LVCMOS, Schmitt Trigger). This input pin selects the output
clock frequency of the C100/66o, a logic low selects the 100 MHz output,
while logic high selects the 66 MHz output clock.
Reference Failure Indicator (LVCMOS). A logic high at this pin indicates that
the REF reference frequency is exhibiting abrupt phase or frequency change.
Lock Indicator (LVCMOS). This output goes to a logic high when the PLL is
frequency locked to a valid input reference.
Clock 65.536 MHz (LVCMOS). This output is used in general TDM applications.
The falling edge of this clock is aligned with rising edge of the input reference
(REF).
Clock 25 MHz (LVCMOS). This is a buffered external oscillator clock, the phase
and frequency accuracy of this output tracks that of the external crystal or
oscillator.
Clock 25 MHz (LVCMOS). This is a buffered external oscillator clock, the phase
and frequency accuracy of this output tracks that of the external crystal or
oscillator.
Clock 25 MHz (LVCMOS). This is a buffered external oscillator clock, the phase
and frequency accuracy of this output tracks that of the external crystal or
oscillator.
Clock 25 MHz (LVCMOS). This is a buffered external oscillator clock, the phase
and frequency accuracy of this output tracks that of the external crystal or
oscillator.
Zarlink Semiconductor Inc.
ZL30110
6
Description
Data Sheet