m21120 Mindspeed Technologies, m21120 Datasheet - Page 26

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m21120

Manufacturer Part Number
m21120
Description
M21120 Crosspoint Switch Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
21120-DSH-001-B, 3/27/03
Table 16. Register Description (Continued)
4..3
2
1..0
7..0
7..0
6..0
1..0
pattern[7:0]
pattern[15:8]
pattern[22:16]
xset[1:0]
txlen[1:0]
rxcirc
rxlen[1:0]
Value is being loaded into PRBS TX shift register when bit rst_tx = 1 (reg e1h, bit-1). Default =
00h. NOTE: Must be set to 01h for PRBS Tx operation.
Value is being loaded into PRBS TX shift register when bit rst_tx = 1
(reg e1h, bit-1). Default = 00h
Value is being loaded into PRBS TX shift register when bit rst_tx = 1
(reg e1h, bit-1). Default = 00h
Selects the xSET mode.
00: ACL latches are transparent. Any switch setting written immediately affects the core
01: ACL latches are controlled through register e8h (software xSET).
10: ACL latches are controlled by pin xSET (hardware control).
34 x 34 3.2 Gbps Crosspoint Switch with Input Equalization
configuration. (default)
Selects TX PRBS pattern length.
00: 2
01: 2
10: 2
11: 22-bit repeating pattern
0: recirculation mode disabled (default)
1: recirculation mode enabled
Selects RX PRBS pattern length.
00: 2
01: 2
10: 2
11: 22-bit repeating pattern
7
15
23
7
15
23
-1 (default)
-1 (default)
E3h: PRBS Pattern Length
E6h: PRBS Pattern [22:16]
-1
-1
-1
-1
E5h: PRBS Pattern [15:8]
E4h: PRBS Pattern [7:0]
Mindspeed Technologies™
E7h: xSET Mode
M21120
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