zl50058 Zarlink Semiconductor, zl50058 Datasheet - Page 50
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zl50058
Manufacturer Part Number
zl50058
Description
12 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 48 Input And 48 Output Streams
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50058.pdf
(108 pages)
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5.0
Serial data which goes into the device is converted into parallel format and written to consecutive locations in the
data memory. Each data memory location corresponds to the input stream and channel number. With the input
channel delay feature disabled, channels written to any of the buffers during Frame N will be read out during Frame
N+2. With the input channel delay feature enabled, channels written to any of the buffers during Frame N will be
read out during Frame N+3.
The input channel offsets affect the overall throughput delay; however the input bit delay and output bit
advancement have no impact on the overall data throughput delay.
In the following paragraphs, the data throughput delay (T) is represented as a function of ST-BUS frames, input
channel number, (m), output channel number (n), and input channel delay (α). Table 7 describes the variable range
for input streams and Table 8 describes the variable range for output streams. Table 9 summarizes the data
throughput delay under various input channel and output channel delay conditions.
Data Delay Through the Switching Paths
Input Stream
Data Rate
16 Mbps
32 Mbps
2 Mbps
4 Mbps
8 Mbps
Input Channel Delay OFF
T = 2 frames + (n - m)
Table 8 - Variable Range for Output Streams
Table 7 - Variable Range for Input Streams
Output Stream
Input Channel
Number (m)
Data Rate
Table 9 - Data Throughput Delay
16 Mbps
32 Mbps
2 Mbps
4 Mbps
8 Mbps
0 to 127
0 to 255
0 to 511
0 to 31
0 to 63
Zarlink Semiconductor Inc.
ZL50057/8
50
Input Channel Delay ON
T = 3 frames - α + (n - m)
Output Channel
Possible Input channel delay (α)
Number (n)
0 to 127
0 to 255
0 to 511
0 to 31
0 to 63
0 to 127
0 to 255
0 to 511
0 to 31
0 to 63
Data Sheet
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