zl50408 Zarlink Semiconductor, zl50408 Datasheet - Page 42

• Manufacturer Part Number: zl50408
• Description: Managed 8-port 10/100m 1-port 10/100/1000m Ethernet Switch
• Manufacturer: Zarlink Semiconductor

ZL50408
Data Sheet
Example : Suppose that the user wants to restrict Fast Ethernet port P’s average departure rate to 32 Mbps – 32%
of line rate – when the average is taken over a period of 10 ms. In an interval of 10 ms, exactly 40000 bytes can be
transmitted at an average rate of 32 Mbps.
So how do we set the parameters?
The rate control parameters are contained in an internal RAM block
accessible through the CPU port (See Rate Control application note, ZLAN-33). The data format is shown below.
63:40
39:32
31:16
15:0
0
Time interval
Maximum burst size
Number of bytes
As we indicated earlier, the number of bytes is measured in 8-byte increments, so the 16-bit field “Number of bytes”
should be set to 40000/8, or 5000. In addition, the time interval has to be set to 10 in units of 1 ms. Though we want
the average data rate on port P to be 32 Mbps when measured over an interval of 10 ms, we can also adjust the
maximum number of bytes that can be transmitted at full line rate in any single burst. Suppose we wish this limit to
be 12 kilobytes. The number of bytes is measured in 8-byte increments, so the 16-bit field “Maximum burst size” is
set to 12000/8, or 1500.
The action on the incoming traffic and outgoing traffic when credit is not available are different. For the outgoing
traffic, the queued frames will be held in the queue until the credit become available. The consequence of this
holding is the exploding queue size that may cause dropping on the receiving side. The capability of ZL50408 on
this perspective is quite limited due to the small frame buffer on chip. The actions on the incoming traffic depending
on the flow control state of that port. If the ingress port flow control is turned on, the XOFF flow control will be
triggered when the credit is running lower than half of the maximum burst size. The XON will be triggered when the
available credit is increased to above the threshold. If the port flow control is disabled, the received traffic will
subject to WRED depending on the credit availability. If the none of the credit is available, all received frame will be
dropped. If only a quarter of maximum burst credits are available, the frame that been marked as high drop will be
drop 100%, the low drop frame will be dropped at ra%, If half of the maximum burst credits are available, high drop
frame will be dropped at rb%. The ra% and rb% can be programmed by RDRC2 register.
7.6
Buffer Management
Because the number of FDB slots is a scarce resource, and because we want to ensure that one misbehaving
source port or class cannot harm the performance of a well-behaved source port or class, we introduce the concept
of buffer management into the ZL50408. Our buffer management scheme is designed to divide the total buffer
space into numerous reserved regions and one shared pool, as shown in Figure 11 on page 43.
As shown in the figure, the FDB pool is divided into several parts. A reserved region for temporary frames stores
frames prior to receiving a switch response. Such a temporary region is necessary, because when the frame first
enters the ZL50408, its destination port and class are as yet unknown, and so the decision to drop or not needs to
be temporarily postponed. This ensures that every frame can be received first before subjecting them to the frame
drop discipline after classifying.
Three priority sections, one for each pair of the first six priority classes, ensure a programmable number of FDB
slots per class. The lowest two classes do not receive any buffer reservation. Furthermore, a frame is stored in the
region of the FDB corresponding to its class. As we have indicated, the eight classes use only two transmission
scheduling queues for RMAC ports (four queues for the GMAC & CPU ports), but as far as buffer usage is
concerned, there are still eight distinguishable classes.
Another segment of the FDB reserves space for each of the 10 ports — 9 ports for Ethernet and one CPU port (port
number 8). Each port has it’s own programmable source port reservation. These 10 reserved regions make sure
that no well-behaved source port can be blocked by another misbehaving source port.
In addition, there is a shared pool, which can store any type of frame. The frame engine allocates the frames first in
the three priority sections. When the priority section is full or the packet has priority 1 or 0, the frame is allocated in
the shared pool. Once the shared pool is full the frames are allocated in the section reserved for the source port.
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