zl50408 Zarlink Semiconductor, zl50408 Datasheet - Page 98
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zl50408
Manufacturer Part Number
zl50408
Description
Managed 8-port 10/100m 1-port 10/100/1000m Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50408.pdf
(132 pages)
- Current page: 98 of 132
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13.3.7.6
CPU Address:h605
Accessed by CPU (R/W)
Note : Before programming MII command: set FEN[6], check MIIC3, making sure no RDY and no VALID; then
program MII command.
13.3.7.7
CPU Address:h606
Accessed by CPU (R/W)
Note : Before programming MII command: set FEN[6], check MIIC3, making sure no RDY and no VALID; then
program MII command. Writing this register will initiate a serial management cycle to the MII management
interface.
13.3.7.8
CPU Address:h607
Accessed by CPU (RO)
13.3.7.9
CPU Address:h608
Accessed by CPU (RO)
Bits [4:0]
Bit [5]
Bit [6]
Bit [7]
Bits[7:0]:
Bits[7:0]:
Bit [4:0]
Bit [6:5]
Bit [7]
MIIC2 – MII Command Register 2
MIIC3 – MII Command Register 3
MIID0 – MII Data Register 0
MIID1 – MII Data Register 1
VALID – Data Valid from PHY (Read Only)
RDY – Data is returned from PHY (Read Only)
PHY_AD – 5 Bit PHY Address
Reserved
MII Data [15:8]
MII Data [7:0]
REG_AD – Register PHY Address
OP – Operation code “10” for read command and “01” for write command
Reserved
Zarlink Semiconductor Inc.
ZL50408
98
Data Sheet
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