zl50418 Zarlink Semiconductor, zl50418 Datasheet - Page 106
zl50418
Manufacturer Part Number
zl50418
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50418.pdf
(163 pages)
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14.11.2
CPU Address 701
Accessed by CPU, serial interface (R/W) (Default 17)
14.11.3
CPU Address 702
Accessed by CPU, serial interface (R/W) (Default FF)
14.11.4
CPU Address 703
Accessed by CPU, serial interface (R/W) (Default 00)
•
•
•
•
•
•
MIRROR1_DEST – Port Mirror destination
MIRROR2_SRC – Port Mirror source port
MIRROR2_DEST – Port Mirror destination
Bit [4:0]:
Bit [4:0]:
Bit [5]:
Bit [6]
Bit [7]
Bit [4:0]:
7
7
7
6
Port Mirror Destination
When port mirroring is enable, destination port can not serve as a data port.
Source port to be mirrored. Use illegal port number to disable mirroring
1 – select ingress data
0 – select egress data
Reserved
Reserved must be set to '1'
Port Mirror Destination
When port mirroring is enable, destination port can not serve as a data port.
5
5
I/O
5
4
Dest Port Select
4
Src Port Select
4
Dest Port Select
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