89hpes12t3bg2 Integrated Device Technology, 89hpes12t3bg2 Datasheet - Page 15

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89hpes12t3bg2

Manufacturer Part Number
89hpes12t3bg2
Description
12-lane 3-port Gen2 Pci Express Switch
Manufacturer
Integrated Device Technology
Datasheet
Thermal Considerations
Power Consumption
(and also listed below).
Table 13 (and also listed below).
tion that is relevant to the thermal performance of the PES12T3BG2 switch.
© 2009 Integrated Device Technology, Inc
Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 13
Maximum power is measured under the following conditions: 70°C Ambient, 85% total link usage on all ports, maximum voltages defined in
This section describes thermal considerations for the PES12T3BG2 (19mm
IDT 89HPES12T3BG2 Data Sheet
Number of active
(Full swing)
(Full swing)
Lanes per Port
4/4/4
4/1/1
Note: It is important for the reliability of this device in any user environment that the junction temperature not exceed the T
specified in Table 16. Consequently, the effective junction to ambient thermal resistance (
maintained below the value determined by the formula:
Given that the values of T
achieve the desired
provided in Table 16), thermal resistance of the chosen adhesive (
circuit board (number of layers and size of the board). As a general guideline, this device will not need a heat sink if the board has 8 or more
layers AND the board size is larger than 4"x12" AND airflow in excess of 0.5 m/s is available. It is strongly recommended that users perform
their own thermal analysis for their own board and system design scenarios.
θ
Symbol
JA(effective)
T
T
A(max)
J(max)
θ
θ
P
JB
JC
θ
JA
Watts
Watts
= (T
mA
mA
J(max)
Effective Thermal Resistance, Junction-to-Ambient
θ
1.0V
Core Supply
Typ
0.53
0.44
531
440
- T
JA
Thermal Resistance, Junction-to-Board
Thermal Resistance, Junction-to-Case
A(max)
is left up to the board or system designer, but in general, it can be achieved by adding the effects of
Table 16 Thermal Specifications for PES12T3BG2, 19x19 mm CABGA324 Package
J(max)
Power Dissipation of the Device
)/P
1.1V
Junction Temperature
Max
Ambient Temperature
0.86
0.61
, T
781
550
Parameter
A(max)
*Notice: The information in this document is subject to change without notice
, and P are known, the value of desired
1.0V
PCIe Analog
Typ
0.40
0.32
402
320
Table 15 PES12T3BG2 Power Consumption
Supply
1.1V
Max
0.53
0.39
484
352
15 of 30
2.5V
PCIe Analog
High Supply
Typ
0.39
0.28
155
110
θ
CS
Value
2
2.75V
23.6
16.8
15.4
14.5
Max
125
), that of the heat sink (
7.6
2.3
0.61
0.36
CABGA324 package). The data in Table 16 below contains informa-
70
220
132
θ
1.0V
PCIe Termin-
Typ
JA
0.23
0.12
ation Supply
230
120
becomes a known entity to the system designer. How to
Units
Watts
o
o
o
o
o
C/W
C/W
C/W
C/W
C/W
o
o
C
C
θ
1.1V
Max
JA
0.29
0.14
264
130
) for the worst case scenario must be
θ
SA
), amount of airflow, and properties of the
3.3V
Typ
0.01
.01
I/O Supply
3
3
Conditions
1 m/S air flow
2 m/S air flow
Zero air flow
Maximum
Maximum
Maximum
3.465V
Max
0.02
.02
4
4
Power
Typ
1.56
1.16
J(max)
θ
July 1, 2009
Total
JC
(value
value
Power
Max
1.51
2.3

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