80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 102

• Manufacturer Part Number: 80ksbr200
• Description: Srio Serial Buffer Flow-control Device
• Manufacturer: Integrated Device Technology

„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
8.4 SERDES Quad Control Register
Port 1 on the SerB). The SerB shall utilize the standard register and observe standard 1x/4x configuration protocols.
Serial Specification.
8.5 Flag and Flag Mask Registers
a maximum of 8 flags plus the masks and destination IDs associated with those flags. The typical flag register content is
shown below table. The flags within a register are selected to generate same interrupt or generate doorbells destined for
the same location. The interrupting flag may individually be identified by the register contents that may be read or sent with
a doorbell.
create doorbells and interrupts. This means there are five register locations associated with each flag.
Name:
Name:
The sRIO specification has defined registers for use in configuring and controlling the 1x/4x Quad Serdes sRIO port (S-
For the rest of the serial ports definition, refer to “RapidIO Interconnect Specification Part VI: Physical Layer 1x/4x LP-
The flag registers are 32-bit registers and include an additional 32-bit register for the flag masks. Each register contains
Contained within each flag register is a series of four mask registers for the flags. The flag mask registers are used to
The content of each flag register is available for reading at any time by any of the following methods:
Bit
31:0
Bit
1:0
4:2
6:5
9:7
31:10
SP_PKT_XMT_CNT
SERDES_QUAD_CTRL
sRIO commands
I
JTAG
2
Field Name
SPKT_XMT_CNT
Field Name
-
TCOEFF[2:0]
-
TXDRVSEL
-
C Interface
RW
Type
RW
RW
Type
Table 83 S-Port Packet Transmitted Counter
102 of 172
Table 84 SERDES Quad Control Register
Address:
Address:
32h0
Reset
Value
0
3b0
0
3b010
0
Reset
Value
0x1860C
0x18C30
Comment
S-Port Packet Transmitted Counter:
Reset 0 by reading
Comment
Reserved
Transmit pre-emphasis control:
000 = 0% emphasis
001 = 6.5% emphasis
010 = 13% emphasis
011 = 19.5% emphasis
100 = 26% emphasis
101 = 32.5% emphasis
110 = 39% emphasis
111 = 45.5% emphasis
Reserved
Tx drive strength select
000 = maximum drive strength
010 = sRIO long haul
100 = sRIO short haul
111 = minimum drive strength
Reserved
Advanced Datasheet*
March 19, 2007