80ksbr200 Integrated Device Technology, 80ksbr200 Datasheet - Page 138
80ksbr200
Manufacturer Part Number
80ksbr200
Description
Srio Serial Buffer Flow-control Device
Manufacturer
Integrated Device Technology
Datasheet
1.80KSBR200.pdf
(172 pages)
- Current page: 138 of 172
- Download datasheet (2Mb)
„2005 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice.NOT AN OFFER FOR SALE The information presented herein is subject to a
Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale or an offer for sale that creates a contractual power of acceptance.
IDT 80KSBR200
Notes
capture cell, which contains only one register. The input to this single register is selected via a mux that is selected by the
output enable cell when EXTEST is disabled. When the Output Enable Cell is driving a high out to the pad (which enables
the pad for output) and EXTEST is disabled, the Capture Cell will be configured to capture output data from the core to the
pad.
enabled, the Capture Cell will capture input data from the pad to the core. The configuration is shown graphically in the
figure below.
The output enable cells are also output cells. The simplified logic appears in the figure below.
The bidirectional cells are composed of only two boundary scan cells. They contain one output enable cell and one
However, in the case where the Output Enable Cell is low (signifying a tri-state condition at the pad) or EXTEST is
Output enable from core
Output Enable
Data from previous cell
From Core
Output from core
Input to core
shift_dr
EXTEST
138 of 172
clock_dr
Figure 45 Diagram of Output Enable Cell
Figure 46 Diagram of Bidirectional Cell
Output Enable Cell
EXTEST
From previous cell
Capture Cell
To next cell
update_dr
D
To next cell
Q
D
To output enable
Q
Advanced Datasheet*
I/O
Pin
March 19, 2007
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