scn68652ac2n40 NXP Semiconductors, scn68652ac2n40 Datasheet - Page 5

• Manufacturer Part Number: scn68652ac2n40
• Description: Scn2652/scn68652 Multi-protocol Communications Controller Mpcc
• Manufacturer: NXP Semiconductors

Philips Semiconductors
1995 May 1
NOTES:
1. Detected in SYNC FF and 7 MS bits of CCSR.
2. In BOP mode, a minimum of two data characters must be received to turn the receiver active.
NOTES:
1. TxCRC selected if TEOM = 1 and the last data character has been shifted out of TxSR.
2. In BCP parity selected will be generated after each character is shifted out of TxSR.
Multi-protocol communications controller (MPCC)
RESET
RxSI
XMITTER
TxBE
MM
S/F
TxA
TxU
FROM
TxE
M
U
X
SEL
CONTROL
TRANS-
MITTER
LOGIC
TxC
DELAY
SYNC
1-BIT
FF
COMPARATOR
SYNC/FLAG
BCP
CCSR (8)
TDSAR
TXSR (8)
FROM
CRC–16 OR CRC–CCITT
1
Figure 3. MPCC Transmitter Data Path
TXCRC ACC (16)
Figure 2. MPCC Receiver Data Path
L
OR PCSAR
FLAG
BOP
M
U
X
CHARACTER
GENERATOR
CONTROL
ABORT
RESET
RxDA
RxSA
L
RxA
RxE
(SYNC)
PARITY (BCP)
ZERO (BOP)
RxCRC ACC
DELETION
LOGIC
LOGIC
GA
5
8
RECEIVER
CONTROL
HSR (16)
LOGIC
RxC
CRC–16 (BCP) OR
ZERO
DELETION
CONTROL
CCRC–CCITT
SEL
(BOP)
M
U
X
8
1, 2
BCP
BOP
BCP
.
.
.
CRC
CRC
CRC
BOP
SCN2652/SCN68652
.
CRC
INSERTION
GENERATION
CRC–CCIT = F0B8
ZERO
LOGIC
BOP
COMPARATOR
PARITY
CRC–16 = 0
BCP
M
U
X
SYNC
DELAY
1 BIT
FF
Product specification
RDSR
RxSR (8)
TO
ZERO
INSERTION
CONTROL
RERR
L
TxSO
SD00060
SD00088