adld25pc Advanced Digital Logic, Inc., adld25pc Datasheet - Page 68
![no-image](/images/no-image-200.jpg)
adld25pc
Manufacturer Part Number
adld25pc
Description
Highly Complex Computer Motherboard In The Pc/104
Manufacturer
Advanced Digital Logic, Inc.
Datasheet
1.ADLD25PC.pdf
(70 pages)
- Current page: 68 of 70
- Download datasheet (3Mb)
Annex: Post-Codes
page 68
93h
94h
95h
96h
C0h
C1h
C3h
C5h
CFh
FFh
Code
Reading in of the hard disk boot sector for the inspection through the internal anti virus program
(trend anti virus code)
1. Enabling of level 2 cache
2. Setting of the clock speed during the boot process
3. Final initialising of the chip set.
4. Final initialising of the power management.
5. Erase the onscreen and display the overview table (rectangular box).
6. Program “write allocation” at K6 CPUs (AMD)
7. Program “write combining” at P6 CPUs (INTEL)
1. Program the changeover of summer-and winter-time
2. Update settings of keyboard-LED and keyboard repeat rates
1. Multi processor system: generate MP-table
2. Generate and update ESCD-table
3. Correct century settings in the CMOS (20xx or 19xx)
4. Synchronise the DOS-system timer with CMOS-time
5. Generate an MSIRQ-Routing table..
Chip set initialising:
- Cut off shadow RAM
- Cut off L2 cache (apron 7 or older)
- Initialise chip set register
Memory detection:
Auto detection of DRAM size, type and error correction (ECC or none)
Auto detection of L2 cache size (apron 7 or older)
Unpacking of the packed BIOS program codes into the random access memory.
Copying of the BIOS program code into the shadow RAM (segments E000 & F000) via chipset
hook.
Testing of the CMOS read/write functionality
Boot trial over boot-loader-routine (software-interrupt INT 19h)
Description
ADL Embedded Solutions ADLD25PC
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